[RuntimeDyld] Improve error diagnostic in RuntimeDyldChecker.

The compiler often emits assembler-local labels (beginning with 'L') for use in
relocation expressions, however these aren't included in the object files.
Teach RuntimeDyldChecker to warn the user if they try to use one of these in an
expression, since it will never work.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212777 91177308-0d34-0410-b5e6-96231b3b80d8
[RuntimeDyld] Replace a crufty old ARM RuntimeDyld test with a new one that uses
RuntimeDyldChecker.

This allows us to remove one of the six remaining object files in the LLVM
source tree.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212780 91177308-0d34-0410-b5e6-96231b3b80d8
Partially fix PR20058: reduce compile time for loop unrolling with very high count by reducing calls to SE->forgetLoop

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212782 91177308-0d34-0410-b5e6-96231b3b80d8
Revert "Reapply "DebugInfo: Ensure that all debug location scope chains from instructions within a function, lead to the function itself.""

This reverts commit r212776.

Nope, still seems to be failing on the sanitizer bots... but hey, not
the msan self-host anymore, it's failing in asan now. I'll start looking
there next.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212793 91177308-0d34-0410-b5e6-96231b3b80d8
[X86] AVX512: Simplify logic in isCDisp8

It was computing the VL/n case as:
  MemObjSize = VectorByteSize / ElemByteSize / Divider * ElemByteSize

ElemByteSize not only falls out but VectorByteSize/Divider now actually
matches the definition of VL/n.

Also some formatting fixes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212794 91177308-0d34-0410-b5e6-96231b3b80d8
[X86] AVX512: Improve readability of isCDisp8

No functional change.  As I was trying to understand this function, I found
that variables were reused with confusing names and the broadcast case was a
bit too implicit.  Hopefully, this is an improvement.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212795 91177308-0d34-0410-b5e6-96231b3b80d8
Fixup PHIs in LowerSwitch when a Leaf node is not emitted.

This commit fixes bug http://llvm.org/bugs/show_bug.cgi?id=20103.

Thanks to Qwertyuiop for the report and the proposed fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212802 91177308-0d34-0410-b5e6-96231b3b80d8
Added test for commit r212802 that was missing

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212803 91177308-0d34-0410-b5e6-96231b3b80d8
[X86] Fix the inversion of low and high bits for the lowering of MUL_LOHI.
Also add a few comments.

<rdar://problem/17581756>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212808 91177308-0d34-0410-b5e6-96231b3b80d8
Add FileCheck -implicit-check-not option to allow stricter tests without adding too many CHECK-NOTs manually.

Summary:
Add FileCheck -implicit-check-not option which allows specifying a
pattern that should only occur in the input when explicitly matched by a
positive check. This feature allows checking tool diagnostics in a way
clang -verify does it for compiler diagnostics.

The option has been tested on a number of clang-tidy checks, I'll post a link to
the clang-tidy patch to this thread.

Once there's an agreement on the general direction, I can add tests and
documentation.

Reviewers: djasper, bkramer

Reviewed By: bkramer

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D4462

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212810 91177308-0d34-0410-b5e6-96231b3b80d8
ARM: Allow __fp16 as a function arg or return type for AArch64

ACLE 2.0 allows __fp16 to be used as a function argument or return
type. This enables this for AArch64.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212812 91177308-0d34-0410-b5e6-96231b3b80d8
raw_svector_ostream: grow and reserve atomically

Including the scratch buffer size in the initial reservation eliminates the
subsequent malloc+move operation and offers a healthier constant growth with
less memory wastage.

When doing this, take care to avoid invalidating the source buffer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212816 91177308-0d34-0410-b5e6-96231b3b80d8
[CMake] add_llvm_library: Add "RUNTIME DESTINATION bin" to install(). It affects add_library(SHARED) for Win32.DLL.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212818 91177308-0d34-0410-b5e6-96231b3b80d8
llvm/test/lit.cfg: Let %python available.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212819 91177308-0d34-0410-b5e6-96231b3b80d8
llvm/test/BugPoint/compile-custom.ll: Use explicit %python to invoke a test script, compile-custom.ll.py, for shebang-incapable hosts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212820 91177308-0d34-0410-b5e6-96231b3b80d8
Add a test case for r212596

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212828 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: fix shadow mapping for 1D and 2D array textures

It was conflicting with def TEX_SHADOW_ARRAY, which also handles them.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212829 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: add sample and image intrinsics exposing all instruction fields

We need the intrinsics with offsets, so why not just add them all.
The R128 parameter will also be useful for reducing SGPR usage.
GL_ARB_image_load_store also adds some image GLSL modifiers like "coherent",
so Mesa will probably translate those to slc, glc, etc.

When LLVM 3.5 is released, I'll switch Mesa to these new intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212830 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Use i32 vectors for resources and samplers

This affects new intrinsics only.

What surprises me is that v32i8 still works.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212831 91177308-0d34-0410-b5e6-96231b3b80d8
[PowerPC] Fix invalid displacement created by LocalStackAlloc

This commit fixes a bug in PPCRegisterInfo::isFrameOffsetLegal that
could result in the LocalStackAlloc pass creating an MI instruction
out-of-range displacement:
        %vreg17<def> = LD 33184, %vreg31; mem:LD8[%g](align=32)
        %G8RC:%vreg17 G8RC_and_G8RC_NOX0:%vreg31
(In final assembler output the top bits are stripped off, resulting
in a negative offset loading from below the stack pointer.)

Common code expects the isFrameOffsetLegal routine to verify whether
adding a given offset to the offset already present in the instruction
results in a valid displacement.  However, on PowerPC the routine
did not take the already present instruction offset into account.

This commit fixes isFrameOffsetLegal to add the instruction offset,
and updates a local caller (needsFrameBaseReg) to no longer add the
instruction offset itself before calling isFrameOffsetLegal.

Reviewed by Hal Finkel.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212832 91177308-0d34-0410-b5e6-96231b3b80d8