Rename folder and change readmem from hex to binary
Add Array copy assembly code , binary isntructions , data and testbench
Add Array sum assembly code , binary isntructions , data and testbench
Add Swap assembly code , binary isntructions and testbench
Add Remainder assembly code , binary isntructions and testbench
Add Odd decrement assembly code , binary isntructions and testbench
Add Concatenation assembly code , binary isntructions and testbench
Add Division assembly code , binary isntructions and testbench
Add Fibonacci assembly code  binary isntructions
fix a bug
fix a bug
Merge branch 'master' of https://github.com/fakhreldin-m-abdelkhalik/Verilog-Mips into Programs
Fix a bug
Add Instructions and test bench
Remove unnecessary files
Merge branch 'master' of https://github.com/fakhreldin-m-abdelkhalik/Verilog-Mips into Programs
Add Absolute assembly code , Instructions and testbench
Add NOR asssembly code and Instructions
Add XOR asssembly code and Instructions
Merge pull request #30 from fakhreldin-m-abdelkhalik/Programs

Programs