Introducing Gris InterConnect (GIC)

Gris InterConnect (GIC) is a special bus used to bridge the two FPGAs in
the Mexiko platform: mexiko and kuba. Kuba is a peripheral FPGA with
support for SDcard, Management Ethernet (ethmac), RTC (SPI/I2C) and GPIO.

The main features of GIC:
 * Small pin count. It is designed to be used over maximum 8 pins.
 * Simple. It doesn't support DMA or burst transactions for example.

It does support classical bus cycles and IRQ multiplexing.

It works by simply bridging Wishbone over the Gris Line Protocol, acting
as a Wishbone slave on the Gris Master side and as a Wishbone master on
the Gris Slave side. Gris is a  point-to-point protocol and transactions
must be initiated by the Gris Master.

This commit temporary moves the G18 flash to Kuba to test the
implementation. It also reserves 0xe0 - 0xe8 in the address space for
Kuba, which means that UART and SPIs have been moved to start @ 0xe8.

See gic_master.v for TODO. The GIC IO driver is not part of this commit
but will follow later.