Save link information in *AL(L) instructions unconditionally

All "Jump and link" and "Branch and link" like instructions save the PC in the
target register unconditionally and not only when the branch/jump is taken.
The specification is not clear whether the store is actually made before or
after the delay slot and therefore the behavior of the dynarecs ("link" before
delay slot) is used.

Reported-by: Nebuleon <nebuleon.fumika@gmail.com>
Merge pull request #9 from ecsv/interpreter_link

Save link information in *AL(L) instructions unconditionally