code generation for registers and toplevel I/O
no tests but. code generation.
Merge remote-tracking branch 'public/master' into issue120-vhdl-codegen
Merge branch 'issue119-simple-drc' into issue120-vhdl-codegen
log4j downgrade to 1.2
add simple test case for output product
Merge branch 'master' into issue120-vhdl-codegen
add newlines to entity, ports
code generation fix for top-level input nets
code gen fixes for registers
checkstyle fixes
remove unused junit dependencies
Merge pull request #133 from mtrberzi/issue120-vhdl-codegen

VHDL code generation: nets, registers