Block related changes ( not working )
new blocks PRU Register Set/Get, MEM Read/Write added
ADC and DAC blocks modification to allow simultaneous operation
New options for DAC block
Driver for simultaneous sampling ADC TI ADS8568
ADC header fix
Missing header for ads8568.c
Function for checking connection with MicroDAQ
Setting model step time in source code instad of static cfg file
This is a first step to avoid calling XDCtool every time during model build. I think that build process can be modified to call XDCTools on the first model build or XDCtools can be executed at the microdaq_setup stage and than just link with created SYS/BIOS object.
Wrong type in quadrature encoder block fix
Changes in source code to reflect new ADC block functionality
Now user can use ADC block to read 8 or 16 channels at once
Initial support for ADS8568 analog-to-digital converter
Build SYS/BIOS once during microdaq_setup execution to speed up model build
XDCtool is executed only during microdaq_setup. Created SYS/BIOS objects are linked during model build instead of building sysbios during every model build. This makes model build proccess faster.
Add sysbios generated files to gitignore
Pass sample time value to static main file (for External mode)
Use STEP_SIZE to setup timer for SYS/BIOS system tick
Merge branch 'block_dev' of https://github.com/kyak/microdaq_ert into block_dev

Merge
Since SYS/BIOS is in fixed location use LDFLAGS
Wrong step time define name for External Mode fix
New tools for PRU core
New blocks for BLDC and DC motor
Initial commit for support for BLDC and DC motor driver
Rename script to mdaq_ping.m
Place global variables in non-cacheable internal shared region
To allow to read/write DSP global variables by MLink they
needs to be placed in fast non-cacheable memory region.
Now in simulink user can assing global variable to a wire
and access them with mlink_get_obj and mlink_set_obj calls.
BLDC/DC motor firmware block update