powerpc/oprofile: Remove unused dump_pmcs() in FSL oprofile

It's still in the git history if anyone wants it.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
powerpc/fsl: Remove cell-index from PCI nodes

The cell-index property isn't used on PCI nodes and is ill defined.
Remove it for now and if someone comes up with a good reason and
consistent definition for it we can add it back

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
powerpc: Refactor board check for PCI quirks on FSL boards with uli1575

Refactor the check to determine if the quirk is applicable to the boards
into one inline function so we only have to change one place to add more
boards that the quirks might be applicable to.

Also removed a warning related to unused temp variable.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
powerpc/86xx: Add 36-bit device tree for mpc8641hpcn

The new dts places most of the devices in physical address space
above 32-bits, which allows us to have more than 4GB of RAM present.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
powerpc/fsl: use of_iomap() for rstcr mapping

The rstcr register mapping code was written sometime ago before
of_iomap() existed.  We can use it and clean up the code a bit
and get rid of one user of get_immrbase() in the process.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
powerpc/85xx: Add binding for LAWs and ECM

The first 4k region of CCSR space is well defined for local access
windows, CCSRBAR, etc.  The second 4k region is well defined as
register for configuring and getting errors for the ECM coherency
module.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
powerpc/85xx: Add new LAW & ECM device tree nodes for all 85xx systems

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
powerpc/86xx: Add binding for LAWs and MCM

The first 4k region of CCSR space is well defined for local access
windows, CCSRBAR, etc.  The second 4k region is well defined as
register for configuring and getting errors for the MPX coherency
module.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
powerpc/86xx: Add new LAW & MCM device tree nodes for all 86xx systems

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
powerpc: make dma_window_* in pci_controller struct avail on 32b

Also, convert them to resource_size_t (which is unsigned long
on 64-bit, so it's not a change there).

We will be using these on fsl 32b to indicate the start and size
address of memory that the pci controller can actually reach - this
is needed to determine if an address requires bounce buffering.  For
now, initialize them to a standard value; in the near future, the
value will be calculated based on how the inbound windows are
programmed.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Ben Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
powerpc/cpm: Remove some cruft code and defines

Kill of some old defines and macros that we no longer use like
CPM_MAP_ADDR and CPM_IRQ_OFFSET.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
powerpc/86xx: clean up smp init code

Removed the need for asm/mpc86xx.h as it was only used in mpc86xx_smp.c
and just moved the defines it cared about into there.  Also fixed up
the ioremap to only map the one 4k page we need access to and to iounmap
when we are done.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
powerpc/85xx: clean up for mpc8568_mds name

Keep an unique machine def for the MPC8568 MDS board to handle some
subtle differences between the future MDS board. Also set the bcsrs in
setup_arch() only for mpc8568_mds because other mds has different bcsr
settings.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
powerpc/qe: update risc allocation for QE

Change the RISC allocation to macros instead of enum, add function to read
the number of risc engines from the new property "fsl,qe-num-riscs" under
the qe node in dts. Add new property "fsl,qe-num-riscs" description in
qe.txt

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
net/ucc_geth: update riscTx and riscRx in ucc_geth

Change the definition of riscTx and riscRx to unsigned integer instead of
enum, and change their values to support 4 risc allocation if the qe has
4 RISC engines.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
powerpc/qe: update QE Serial Number

The latest QE chip may have more Serial Number(SNUM)s of thread to use. We
will get the number of SNUMs from device tree by reading the new property
"fsl,qe-num-snums", and set 28 as the default number of SNUMs so that it is
compatible with the old QE chips' device trees which don't have this new
property. The macro QE_NUM_OF_SNUM is defined as the maximum number in QE
snum table which is 256.

Also we update the snum_init[] array with 18 more new SNUMs which are
confirmed to be useful on new chip.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
net/ucc_geth: Assign six threads to Rx for UEC

In the case the QE has 46 SNUMs for the threads to support four UCC
Ethernet at 1000Base-T simultaneously.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Acked-by: David S. Miller <davem@davemloft.net>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
powerpc/85xx: Add MPC8569MDS board support

The MPC8569 is similiar to the MPC8568.  It doubles the number of
QUICC Engine RISC cores from 2 to 4.  Removes eTSECs, TLU and adds
the eSDHC controller.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
powerpc/qe: add new qe properties for QE based chips

Add fsl,qe-num-riscs and fsl,qe-num-snums to all the devices trees which
have qe node.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
powerpc/fsl: Removed reg property from 85xx/86xx soc node

Between the addition of the ecm/mcm law nodes and the fact that the
get_immrbase() has been using the range property of the SoC to determine
the base address of CCSR space we no longer need the reg property at
the soc node level.  It has been ill specified and varied between device
trees to cover either the {e,m}cm-law node, some odd subset of CCSR
space or all of CCSR space.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>