build.mk: add dependency between zpool.so and libzfs.so

adding the dependency in build.mk seems to fix my parallel build
failure with zpool.so.

I suspect however that there is a more general build system
issue here.

Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com>
pci: separate generic code from x64-specific code

this patch moves the common pci definitions and the prototypes for
the architecture-dependent pci functions from drivers/pci.hh to
arch/common/pci.hh, and puts (most of) the x64-specific PCI stuff
in arch/x64/pci.cc.
Prepare arch-pci.hh with some x64-specific definitions, and build
the new arch/x64/pci.o module.

Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com>
pci: remove use of processor in pci-function.hh

there is no need to get the processor namespace just by
including pci-function.hh, which can be processor independent.

Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com>
Reviewed-by: Nadav Har'El <nyh@cloudius-systems.com>
pci: enable bars issuing pci command

for architectures other than x64 we need to reprogram the
BAR registers as we have no magical good values already
programmed by the "firmware" (qemu...).
It is also possible that there will be the need to reprogram
them on x64 in the future.
Trying to do that without explicitly enabling the I/O space
and memory space using a PCI command leads, in the case of
QEMU, to the reprogramming to be silently ignored.

There is therefore some minor restructuring of the pci
device / function code to account for a slightly different
procedure for the BARs, where we now:

enable access to I/O and mem, then
for each bar
    we first read the bar size, then
    call some arch-dependent code to fix up the final BAR reg,
    so that archs have a chance to reprogram it, then
    we proceed to assign the final address to the bar.

Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com>
aarch64: mmu: extend device memory range

at some point we need to get rid of those hardcoded addresses,
but that requires some changes to propagate the property through
the MMU template code, which I still didn't manage to work
reliably.

Suppress the debug message which was emitted for each page
with memory attributes for device memory, since when adding the
full PCI space for mach-virt that was starting to pollute the
output too much (and it seems to be working fine anyway).

Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com>
Reviewed-by: Nadav Har'El <nyh@cloudius-systems.com>
aarch64: first pci implementation

to make effective use of this implementation of PCI for AArch64
the QEMU patches to enable PCI in mach-virt by Rob Herring and
Alvise Rigo are necessary (and out of tree for now).

Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com>
aarch64: enable virtio and virtio-blk

these patches allow early enablement of virtio and virtio-blk
for AArch64 with a fair amount of AARCH64_PORT_STUB defines.

The main issue is the "interrupt module", as loosely defined
by core/interrupt.cc and include/osv/interrupt.hh, which is
actually x64-specific.

Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com>