smp: Replace QEMU SMP init assembler code with C; run only in 32bit mode.

Change the multi-processor init code to trampoline into 32bit mode on
each of the additional processors.  Implement an atomic lock so that
each processor performs its initialization serially.

Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Don't enable thread preemption during S3 resume vga option rom execution.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Remove old Bochs bios fixed address string at 0xfff00.

There is no indication that the address 0xff00 is a BIOS standard, so
don't emit the old Bochs copyright string at that fixed address.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Move most of the VAR16FIXED() defs to misc.c.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
build: Avoid absolute paths during "whole-program" compiling.

The build currently does a textual include of all files in order to
use the -fwhole-compile optimization.  Update it to use relative file
paths instead of absolute file paths.  This makes the section names in
the resulting binary more readable.  It also makes the build easier on
some Windows hosts.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
build: use -m16 where available instead of asm(".code16gcc")

GCC 4.9 and clang 3.5 support the -m16 option on the command line which
supersedes the hackish ".code16gcc" assembler directive. Use it where
possible.

Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
romlayout: Use .code16 not .code16gcc

There's no need to use .code16gcc where we are writing assembler code
explicitly. It only affects word-size-ambiguous instructions, and we
should just be explicit. And we are.

Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
vgabios: Use .code16 not .code16gcc

There's no need to use .code16gcc where we are writing assembler code
explicitly. It only affects word-size-ambiguous instructions, and we
should just be explicit. And we are.

Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>