BACKPORT: ASoC: Intel: Fix corruption in BYT PCM driver.

The PCM ops in BYT PCM driver are over writing the RTD driver data causing
corruption after first playback or capture has been opened. Fix this by not
using snd_soc_pcm_set_drvdata(). There are no other users of
snd_soc_pcm_set_drvdata upstream so this needs to be removed uptream too.

BUG=chrome-os-partner:26908
TEST=apply full patch set. Run aplay and arecord simulteneously, see
no kernel crash.

Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
(cherry picked from commit 7b5497d6193416b15e81ecae1bb1a5c6f90a50dc)

Original-Change-Id: I595f795ec128e4b0b185cfcbfb9a56332f01a8c3
Signed-off-by: Hsin-Yu Chao <hychao@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/190462
Reviewed-by: Benson Leung <bleung@chromium.org>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Commit-Queue: Benson Leung <bleung@chromium.org>
Tested-by: Benson Leung <bleung@chromium.org>
(cherry picked from commit e4d3d89595057559b43952ef0ee284bcd7514dac)

Change-Id: I20695a0fa72b4b5d1e6d4fd727521ee11075c78d
Reviewed-on: https://chromium-review.googlesource.com/190570
Reviewed-by: Bernie Thompson <bhthompson@chromium.org>
Commit-Queue: Benson Leung <bleung@chromium.org>
Tested-by: Benson Leung <bleung@chromium.org>
(cherry picked from commit 579119d05f513cd5d5ceb24df040ea01143ec686)
Reviewed-on: https://chromium-review.googlesource.com/190874
Reviewed-by: Benson Leung <bleung@chromium.org>
Commit-Queue: Bernie Thompson <bhthompson@chromium.org>
Tested-by: Bernie Thompson <bhthompson@chromium.org>
CHROMIUM: ASoC: Intel: Use stream direction to access pcm_data

Originally the private data of sst-baytrail driver keeps
two copy of pcm_data and letting streams access it using the
id of cpu_dai.  This causes a problem when doing capture and
playback to the same device simultaneously, since these two
streams are sharing the same pcm_data.

Change to use stream direction as index to access the two
pcm_data, so that we can open two streams of different
direction on the same device concurrently.

BUG=chrome-os-partner:26908
TEST=Manual: Run aplay and arecord concurrently on rambi.
See no kernel crash.

Original-Change-Id: I084434faa165e440d8106d50e7533ff4e0b31ae8
Signed-off-by: Hsin-Yu Chao <hychao@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/190297
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Commit-Queue: Benson Leung <bleung@chromium.org>
Tested-by: Benson Leung <bleung@chromium.org>
(cherry picked from commit d25161da8f2daa92285ac5b7630e777cdb37114e)
Signed-off-by: Benson Leung <bleung@chromium.org>

Change-Id: I4e4e45acc711fdbfe78cd9a4f7f38509cb07480d
Reviewed-on: https://chromium-review.googlesource.com/190572
Reviewed-by: Bernie Thompson <bhthompson@chromium.org>
Commit-Queue: Benson Leung <bleung@chromium.org>
Tested-by: Benson Leung <bleung@chromium.org>
(cherry picked from commit 86e6fd698bf7fe640590980a3cd205dcfeea7f74)
Reviewed-on: https://chromium-review.googlesource.com/190875
Reviewed-by: Benson Leung <bleung@chromium.org>
Commit-Queue: Bernie Thompson <bhthompson@chromium.org>
Tested-by: Bernie Thompson <bhthompson@chromium.org>
CHROMIUM: ASoC: max98090 - Fix dmic table entries for 19.2MHz sysclk.

Fix the dmic divisor and compensation values for at 19.2 MHz sysclk.
Rambi uses 19.2MHz always so it's important they are correct.

BUG=chrome-os-partner:25855
TEST=Record audio from DMIC on rambi and listen for noise.

Signed-off-by: Dylan Reid <dgreid@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/187687
Reviewed-by: Benson Leung <bleung@chromium.org>
(cherry picked from commit 6f5a1d310042d870ac0b9b25de0f58f51cc200d2)

Change-Id: I48be92f0d53785c607b2a15cea6376d886582aa5
Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/190526
Reviewed-by: Benson Leung <bleung@chromium.org>
Tested-by: Bernie Thompson <bhthompson@chromium.org>
Commit-Queue: Bernie Thompson <bhthompson@chromium.org>
(cherry picked from commit eeab17d31a77be0fc2e8a3ec4f3ab7b7b2c53ca7)
Reviewed-on: https://chromium-review.googlesource.com/191507
CHROMIUM: ASoC: Intel: rambi: Fix max98090 master clock setting

Currently we set max98090 master clock to params_rate(params) * 256,
which should actually be BYT_PLAT_CLK_3_HZ, that is, 19.2MHz.

BUG=chrome-os-partner:25855,chrome-os-partner:26051
TEST=Record and play sound on rambi board. Check noise of recorded
  sound is reduced.

Signed-off-by: Cheng-Yi Chiang <cychiang@chromium.org>

[bleung : modified Cheng-Yi's change to reflect change to 19.2MHz
 in coreboot ]
Signed-off-by: Benson Leung <bleung@chromium.org>

Reviewed-on: https://chromium-review.googlesource.com/187586
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Tested-by: Benson Leung <bleung@chromium.org>
Commit-Queue: Dylan Reid <dgreid@chromium.org>
(cherry picked from commit e2b4cc974a017bb92ae1233408cd58ccf702ccbd)

Conflicts:

	sound/soc/mid-x86/byt_rambi_max98090.c

Change-Id: I33a3bc176c740896a575cf0bb15f50ffc36bbb90
Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/190527
Reviewed-by: Benson Leung <bleung@chromium.org>
Tested-by: Bernie Thompson <bhthompson@chromium.org>
Commit-Queue: Bernie Thompson <bhthompson@chromium.org>
(cherry picked from commit bfe1d01ecb303eacd89e79606fdc5bd3005453e3)
Reviewed-on: https://chromium-review.googlesource.com/191508
CHERRY-PICK: CHROMIUM: Input: elan_i2c - Add retry mechanism.

When send initialize, disable, enable and sleep commands,
driver add retry machenism (3 times) to avoid host I2C occured
execption error (maybe tx timeout or no clock/data signal)
let TP no function.

Signed-off-by: Duson Lin <dusonlin@emc.com.tw>
BUG=chrome-os-partner:26110, chrome-os-partner:26800
TEST=on chromebook with Elan touchpad, boot and touchpad works.

Change-Id: I92aa374ea1109d08fde42c40810951e641ce0601
Original-Change-Id: I6d0285f3cdb716124980fa4df1c71f3c99c1df22
Reviewed-on: https://chromium-review.googlesource.com/190460
Reviewed-by: Benson Leung <bleung@chromium.org>
Tested-by: Benson Leung <bleung@chromium.org>
Reviewed-by: Bernie Thompson <bhthompson@chromium.org>
Commit-Queue: Bernie Thompson <bhthompson@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/192981
Commit-Queue: Kevin Cheng <kevin.cheng@intel.com>
Tested-by: Kevin Cheng <kevin.cheng@intel.com>
CHROMIUM: i2c-designware: Fix I2C timeout at 400KHz

It looks like the problem is that interrupts start right away when the
controller is enabled. There's this comment in __i2c_dw_enable:

/*
 * Wait 10 times the signaling period of the highest I2C
 * transfer supported by the driver (for 400KHz this is
 * 25us) as described in the DesignWare I2C databook.
 */

The dw_enable then does a usleep for 25us, but since interrupts were
previously enabled, this wait wasn't being respected.

The patch disables interrupts while the controller is disabled.

BUG=chrome-os-partner:27166
TEST=Build and run suspend/resume cycles on Rambi. No timeout observed.

Change-Id: I63bce088f05521bf68251dc9c4ae9d8d786540c9
Signed-off-by: Wenkai Du <wenkai.du@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/192905
Reviewed-by: Benson Leung <bleung@chromium.org>
Commit-Queue: Bernie Thompson <bhthompson@chromium.org>
Tested-by: Bernie Thompson <bhthompson@chromium.org>
(cherry picked from commit 28b745c97a9d278422f25510ed94e8b4446289df)
Reviewed-on: https://chromium-review.googlesource.com/193323