[AArch64] Missing aliases for CMP/CMN [W]SP with no shift

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210464 91177308-0d34-0410-b5e6-96231b3b80d8
[X86] Use ADD/SUB instead of INC/DEC for Silvermont

According to Intel Software Optimization Manual 
on Silvermont INC or DEC instructions require 
an additional uop to merge the flags.
As a result, a branch instruction depending 
on an INC or a DEC instruction incurs a 1 cycle penalty.

Differential Revision: http://reviews.llvm.org/D3990



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210466 91177308-0d34-0410-b5e6-96231b3b80d8