include/device/device.h: Provide DEVICE_NOOP macro shim

Rather than everyone writing their own adhoc device operation
NOP shim, we provide some formalism. We later make use of this
to reduce the loc count down trivially.

Change-Id: I2d04bfb50e76f367a0ee258dab97d7caa12ec99e
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7283
Tested-by: build bot (Jenkins)
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
drivers: Use DEVICE_NOOP macro over dummy symbol

Change-Id: I931bd9c89bce6ac8f8e9e482a7876e2004abfb38
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7284
Tested-by: build bot (Jenkins)
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
{cpu,soc}: Use DEVICE_NOOP macro over dummy symbol

Change-Id: Iaf2b2873bd1c52d7f936bd9b483e194a0872a626
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7285
Tested-by: build bot (Jenkins)
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
mainboard: Use DEVICE_NOOP macro over dummy symbol

Change-Id: I37c302c7a17645f55d568c1a5f7bb791319ddbb4
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7286
Tested-by: build bot (Jenkins)
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
northbridge/intel: Use DEVICE_NOOP macro over dummy symbol

Change-Id: I9aeed70f72d4df260312df6e53379f1741415b65
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7287
Tested-by: build bot (Jenkins)
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
northbridge/amd: Use DEVICE_NOOP macro over dummy symbol

Change-Id: I3fdd2a9f981592112998d74ce4cfe4850d8fab31
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7288
Tested-by: build bot (Jenkins)
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
northbridge/via: Use DEVICE_NOOP macro over dummy symbol

Change-Id: Ib9d0fae363c5c1fbed3a63cb8aa86716cf1f9ee1
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7289
Tested-by: build bot (Jenkins)
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
superio/common/conf_mode.c: Introduce 'new' enter/exit keys for SIO's

Super I/O manufactures have found new and innovative ways to enter
and exit out of LDN config in PNP config space.

Change-Id: Id3f5882664f1b2b18b49f32373430cf4b037ad22
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7308
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
superio/fintek/f81216h: Implement device support

Change-Id: I20a34b569f109dd12af29e9e0cee8f7f6b8ebb80
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7309
Tested-by: build bot (Jenkins)
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
amd/agesa/f10: Invalid inline asm in gcc-intrin.h

Forward port commit:
db0e0e2 amd/agesa/*/gcc-intrin.h: Invaild inline asm

Change-Id: Ic1bd19087a4500ba0ca9e312ea351e301ab42518
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7301
Tested-by: build bot (Jenkins)
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
amd/agesa/f12: Invalid inline asm in gcc-intrin.h

Forward port commit:
db0e0e2 amd/agesa/*/gcc-intrin.h: Invaild inline asm

Change-Id: Ife26fb5eca5164e72b5e55eba90757253765b633
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7300
Tested-by: build bot (Jenkins)
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
amd/agesa/f15: Invalid inline asm in gcc-intrin.h

Forward port commit:
db0e0e2 amd/agesa/*/gcc-intrin.h: Invaild inline asm

Change-Id: I52da16b39293c8aeff150db83b8b1aeaa232c205
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7299
Tested-by: build bot (Jenkins)
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
intel/bd82x6x: Add new current for native USB ports

Change-Id: I88ef36b94b961a318d280d8de1b8721fcbeb93b0
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: http://review.coreboot.org/7237
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
gigabyte/ga-b75m-d3h: Add new Intel mainboard

This is based on LENOVO X230 port. Board boots to linux via SATA.

Remaining Issues:

1. Native raminit sometimes fails with "timC write discovery failed"
   even without changing the ram configuration.
   I suggest altering the native raminit code so that it reboots
   if that message appears to give a chance for the boot process to recover.

2. VGA does not work.
   Native graphics initialization only supports LVDS and the
   VGA Option ROM still hangs when run in SeaBIOS

3. USB does not work.
   SeaBIOS/GRUB2 do not detect devices connected to USB ports

4. Sound needs corrected codec verb settings

Change-Id: Ib465a4824ef1a71ab6aa17bd40fc281215c6d44f
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: http://review.coreboot.org/7020
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
SeaBIOS Makefile.inc: Remove build dir for uppermem option

The build directory got removed while my patch was in flight and I
didn't notice when I submitted it.

The uppermemory change was added in
commit 4d7d25f38a - http://review.coreboot.org/#/c/6364

The output directory was changed for everything else in
commit ab11a6a94c - http://review.coreboot.org/#/c/6460

Change-Id: Ib8311f694280d305e826adbb76e3e7b722b30e0f
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/7298
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
mainboard/asus/m2n32_ws_professional: Add new board (copy of m2n-e)