removed old 3.6 style gr-drm code folder
ported the first block (bit scrambler). unit test succeeds.
added drm_transm_params class. instantiating with correct parameters works without segfault, some more testing would do no harm though.
ported audio encoder. unit test works, fg with encoder and scrambler seems to work well.
ported FAC generator. unit test succeeds, execution in fg does not crash.
added SDC generator. Unit test succeeds and fg execution does not crash.
added new files for adding tailbits. no functional code yet.
ported tailbit adder. unit test succeeds and execution in fg does not crash.
ported puncturing block. unit test succeeds, execution in fg not yet tested because this block is part of the multi level coder that will be tested as a whole.
ported interleaver block. unit test succeeds and execution in fg does not crash.
corrected docstrings in header files.
ported cell interleaver. unit test succeeds (just a dummy) and execution in fg does not crash.
added files for partitioning block. not functional yet.
ported partitioning block. unit test succeeds and fg execution shows expected results.
ported bit to symbol mapper. unit test succeeds, not verified in grc fg, block appears and looks good though.
ported qam mapping block. block shows in GRC, not tested though.
recreated flow graphs for 4 and 16 QAM MLC hier blocks. Started fixing the top-level transmitter flow graphs. The MLC blocks are somehow not recognized to have vector inputs and therefore dont work properly.
fixed 16/4 transmitter flowgraph, added 64 qam mlc fg, compiles but is still untested. other transmitter flowgraphs need to be updated to use 3.7 blocks as well.
continued fixing the flow graphs and hier blocks. not done yet.
flowgraphs now work. verified with DREAM.