Committing GCD example.
function library updated..
minor bug fix.
added timer operator.
Finished adding timer routines "countDownTimer" and "getClockTime"
to the AHIR function-library.  These can provide (very basic) real-time
capabilities.
committing to merge stashed copy.
recommit to unstash
Committing changes to llvm2aa for suppression of
do-while extraction when a special function is
called in the loop.
Reasonably stable version..  Next step is to treat
the split operators in a truly "split" fashion.
Several changes: one major bug fix in pipelined FP operator
VHDL code (related to stall handling).  Some minor additions
to the logging via VHPI.  Also, Ctestbench VHDL code moved
to VHDL/Vhpi and some library reorganization.
Some more testing and trivial bug fixes.  Interesting
observation: in a5, turning loop-pipeling on causes
the circuit to run slower.  This must be due to the
increased control delays due to the additional joins.
Need to revisit the timing  issues.
Simplified the Control flow structure by avoiding the
printing of redundant dependencies.  Also set the default
mode for the generated hardware as follows
  - unshared datapath elements are single cycle
  - shared elements use at least a 3-stage pipeline.
  - control elements all have bypass.
This gives us 18 cycles/bit in A5, and reasonably
good clock periods.

Next step (after which we close basic development) is
to use all-pair path analysis to eliminate all redundant
arcs from the control path.
Added an optimization to eliminate redundant arcs.  This
involves solving an all-pairs longest paths problem on
an undirected graph.  The current implementation uses
Floyd-Warshall, which is a bit inefficient.
More efficient all-pairs-longest-path algorithm implemented.
Some testing done.  More necessary..
Added GhdlLink.vhdl to release are in VHDL.
GhdlLink provides the VHPI interface to GHDL.
Cleaned up the dot-file printing.  quite useful
to visualize the CP.
Fixed a bug in printing VC model for ternary expression
(in optimized mode).
Fixed a bug in  the loop-pipelining which was
resulting in deadlocks.  Solution was to accept
computation only after reserving all necessary
resources.
Added some useful examples..
Some steps towards more aggressive loop pipelining.
Need to evaluate further.