ARM: sun7i: dt: Fix interrupt trigger types

The Allwinner A20 uses the ARM GIC as its internal interrupts controller. The
GIC can work on several interrupt triggers, and the A20 was actually setting it
up to use a rising edge as a trigger, while it was actually a level high
trigger, leading to some interrupts that would be completely ignored if the
edge was missed.

Fix this for the remaining DT nodes that slipped through.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: stable@vger.kernel.org
ARM: sunxi: dt: Change the touchscreen compatibles

Switch the device tree touchscreen compatibles to have a common pattern accross
all Allwinner SoCs. Since the touchscreen driver has not been merged yet, it
has no side effect.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
ARM: 7963/1: mm: report both sections from PMD

On 2-level page table systems, the PMD has 2 section entries. Report
these, otherwise ARM_PTDUMP will miss reporting permission changes on
odd section boundaries.

Signed-off-by: Kees Cook <keescook@chromium.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Steve Capper <steve.capper@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARM: 7964/1: Detect section mismatches in thumb relocations

Add processing for normally encountered thumb relocation types so that
section mismatches will be detected.

Comment from Rusty Russell follows:

Happiest for this to go through an ARM tree, so:

Signed-off-by: David A. Long <dave.long@linaro.org>
Acked-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
spi/topcliff-pch: Fix DMA channel

bus_num might be asigned dynamically to e.g. 32766. In this case the
calculated DMA channel based on SPI bus number is bogus. Use SPI channel
number instead for calculation.

Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
ARM: OMAP5: PRM: Fix reboot handling

Use the correct register offset for issuing the
reset command in OMAP5. Since dev_inst is set dynamically
OMAP4 should not be affected by this change.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@gmail.com>
Tested-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
ARM: DRA7: hwmod data: correct the sysc data for spinlock

The spinlock module's SYSCONFIG register on DRA7xx does not
support smart wakeup, and also does not have the CLKACTIVITY
field. The sysc data for spinlock module has been appropriately
fixed up to reflect the same.

Cc: Ambresh K <ambresh@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
ARM: OMAP4: hwmod: Fix SOFTRESET logic for OMAP4

Commit 313a76e (ARM: OMAP2+: hwmod: Fix SOFTRESET logic) introduced
softreset bit cleaning right after set one. It is caused L3 error for
OMAP4 ISS because ISS register write occurs when ISS reset process is in
progress. Avoid this situation by cleaning softreset bit later, when reset
process is successfully finished.

Signed-off-by: Illia Smyrnov <illia.smyrnov@globallogic.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
ARM: OMAP2+: clock: fix clkoutx2 with CLK_SET_RATE_PARENT

If CLK_SET_RATE_PARENT is set for a clkoutx2 clock, calling
clk_set_rate() on the clock "skips" the x2 multiplier as there are no
set_rate and round_rate functions defined for the clkoutx2.

This results in getting double the requested clock rates, breaking the
display on omap3430 based devices. This got broken when
d0f58bd3bba3877fb1af4664c4e33273d36f00e4 and related patches were merged
for v3.14, as omapdss driver now relies more on the clk-framework and
CLK_SET_RATE_PARENT.

This patch implements set_rate and round_rate for clkoutx2.

Tested on OMAP3430, OMAP3630, OMAP4460.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
ARM: 7980/1: kernel: improve error message when LPAE config doesn't match CPU

Currently, when the kernel is configured with LPAE support, but the
CPU doesn't support it, the error message is fairly cryptic:

  Error: unrecognized/unsupported processor variant (0x561f5811).

This messages is normally shown when there is an issue when comparing
the processor ID (CP15 0, c0, c0) with the values/masks described in
proc-v7.S. However, the same message is displayed when LPAE support is
enabled in the kernel configuration, but not available in the CPU,
after looking at ID_MMFR0 (CP15 0, c0, c1, 4). Having the same error
message is highly misleading.

This commit improves this by showing a different error message when
this situation occurs:

  Error: Kernel with LPAE support, but CPU does not support LPAE.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Merge tag 'for-v3.14-rc/omap-fixes-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.14/fixes

Several OMAP clock/PM/device data fixes for v3.14-rc.  There's an OMAP5
reboot fix in there, plus a clock fix for rate computations involving
x2 multipliers.

Basic build, boot, and PM test logs are available here:

http://www.pwsan.com/omap/testlogs/prcm-fixes-a-v3.14-rc/20140219131753/

Note that most full-chip PM is broken since the v3.14 merge; it's
not caused by this series.
ARM: OMAP2+: Add support for thumb mode on DT booted N900

Without enabling the workaround for ARM errata 430973 thumb
compiled userland crashes randomly on the Nokia N900.

Signed-off-by: Sebastian Reichel <sre@debian.org>
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Tony Lindgren <tony@atomide.com>
ARM: OMAP: Kill warning in CPUIDLE code with !CONFIG_SMP

for non SMP build, NR_CPUS is 1 and hence the code complains with below
warnings.

arch/arm/mach-omap2/cpuidle44xx.c:207:8: warning: array subscript is above array bounds [-Warray-bounds]
arch/arm/mach-omap2/cpuidle44xx.c:212:11: warning: array subscript is above array bounds [-Warray-bounds]

Kill it by making array size fixed.

Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Update dtsi with new pinctrl compatible string

This commit updates bcm11351.dtsi with the new compatible string for
the same driver.

Signed-off-by: Sherman Yin <syin@broadcom.com>
Reviewed-by: Matt Porter <mporter@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Christian Daudt <bcm@fixthebug.org>
pinctrl: refer to updated dt binding string.

Bring the driver in line with the bcm-based dt name for pinctrl.
This is being done to keep consistency with other Broadcom mobile
SoC drivers.

Signed-off-by: Christian Daudt <bcm@fixthebug.org>
Reviewed-by: Matt Porter <mporter@linaro.org>
pinctrl: Rename Broadcom Capri pinctrl binding

The compatible string of the Broadcom Capri pinctrl driver is renamed to
"brcm,bcm11351-pinctrl" to match the machine binding here:
Documentation/devicetree/bindings/arm/bcm/bcm11351.txt

Signed-off-by: Sherman Yin <syin@broadcom.com>
Reviewed-by: Matt Porter <mporter@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Christian Daudt <bcm@fixthebug.org>
spi-topcliff-pch: Fix probing when DMA mode is used

If during registering SPI master due to SPI device probing a SPI transfer
is issued the DMA buffers are not allocated yet.

This fixes the following oops:
pch_spi 0000:02:0c.1: enabling device (0000 -> 0002)
pch_spi 0000:02:0c.1: master is unqueued, this is deprecated
BUG: unable to handle kernel NULL pointer dereference at   (null)
IP: [<c125aa05>] pch_spi_handle_dma+0x15c/0x6f4
[...]

Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
genirq: Remove racy waitqueue_active check

We hit one rare case below:

T1 calling disable_irq(), but hanging at synchronize_irq()
always;
The corresponding irq thread is in sleeping state;
And all CPUs are in idle state;

After analysis, we found there is one possible scenerio which
causes T1 is waiting there forever:
CPU0                                       CPU1
 synchronize_irq()
  wait_event()
    spin_lock()
                                           atomic_dec_and_test(&threads_active)
      insert the __wait into queue
    spin_unlock()
                                           if(waitqueue_active)
    atomic_read(&threads_active)
                                             wake_up()

Here after inserted the __wait into queue on CPU0, and before
test if queue is empty on CPU1, there is no barrier, it maybe
cause it is not visible for CPU1 immediately, although CPU0 has
updated the queue list.
It is similar for CPU0 atomic_read() threads_active also.

So we'd need one smp_mb() before waitqueue_active.that, but removing
the waitqueue_active() check solves it as wel l and it makes
things simple and clear.

Signed-off-by: Chuansheng Liu <chuansheng.liu@intel.com>
Cc: Xiaoming Wang <xiaoming.wang@intel.com>
Link: http://lkml.kernel.org/r/1393212590-32543-1-git-send-email-chuansheng.liu@intel.com
Cc: stable@vger.kernel.org
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
genirq: Include missing header file in irqdomain.c

Include appropriate header file include/linux/of_irq.h in
kernel/irq/irqdomain.c because it contains prototype definition of
function define in kernel/irq/irqdomain.c.

This eliminates the following warning in kernel/irq/irqdomain.c:
kernel/irq/irqdomain.c:468:14: warning: no previous prototype for ‘irq_create_of_mapping’ [-Wmissing-prototypes]

Signed-off-by: Rashika Kheria <rashika.kheria@gmail.com>
Reviewed-by: Josh Triplett <josh@joshtriplett.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Link: http://lkml.kernel.org/r/eb89aebea7ff1a46122918ac389ebecf8248be9a.1393493276.git.rashika.kheria@gmail.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
cpuset: fix a locking issue in cpuset_migrate_mm()

I can trigger a lockdep warning:

  # mount -t cgroup -o cpuset xxx /cgroup
  # mkdir /cgroup/cpuset
  # mkdir /cgroup/tmp
  # echo 0 > /cgroup/tmp/cpuset.cpus
  # echo 0 > /cgroup/tmp/cpuset.mems
  # echo 1 > /cgroup/tmp/cpuset.memory_migrate
  # echo $$ > /cgroup/tmp/tasks
  # echo 1 > /cgruop/tmp/cpuset.mems

  ===============================
  [ INFO: suspicious RCU usage. ]
  3.14.0-rc1-0.1-default+ #32 Not tainted
  -------------------------------
  include/linux/cgroup.h:682 suspicious rcu_dereference_check() usage!
  ...
    [<ffffffff81582174>] dump_stack+0x72/0x86
    [<ffffffff810b8f01>] lockdep_rcu_suspicious+0x101/0x140
    [<ffffffff81105ba1>] cpuset_migrate_mm+0xb1/0xe0
  ...

We used to hold cgroup_mutex when calling cpuset_migrate_mm(), but now
we hold cpuset_mutex, which causes task_css() to complain.

This is not a false-positive but a real issue.

Holding cpuset_mutex won't prevent a task from migrating to another
cpuset, and it won't prevent the original task->cgroup from destroying
during this change.

Fixes: 5d21cc2db040 (cpuset: replace cgroup_mutex locking with cpuset internal locking)
Cc: <stable@vger.kernel.org> # 3.9+
Signed-off-by: Li Zefan <lizefan@huawei.com>
Sigend-off-by: Tejun Heo <tj@kernel.org>