lavu: add missing log.h include in timer.h
fate: force the simple idct for xvid custom matrix test

The original test without a forced idct is still useful since it tests
the switching of the idct algorithm/permutation on x86 with MMX. MMXext
or SSE2. Make sure the test runs only if MMX inline asm is available and
force -cpuflags to all.
Add the required bitexact flag for both tests.
vp8: Use 2 registers for dst_stride and src_stride in neon bilin filter

Based on a patch by Ronald S. Bultje.

Signed-off-by: Martin Storsjö <martin@martin.st>
vp8: fix bilinear C code to work if src_stride != dst_stride.

Signed-off-by: Anton Khirnov <anton@khirnov.net>
Signed-off-by: Janne Grunau <janne-libav@jannau.net>
arm: Add X() around all references to extern symbols

Don't rely on the fact that an unprefixed label currently exists.

Signed-off-by: Martin Storsjö <martin@martin.st>
arm: Add EXTERN_ASM to the .func and .type declarations for exported symbols

This makes the generated assembly more internally consistent,
avoiding declaring two labels for the same function (for cases
where EXTERN_ASM is empty) and not declaring a separate unprefixed
label in other cases.

This also makes sure the .func and .type delcarations have the same
prefix. They have previously not been used on the platforms
that have prefixed symbols on arm (iOS), but gas-preprocessor
has recently started using the .func declarations for adding
.thumb_func declarations for such functions.

Signed-off-by: Martin Storsjö <martin@martin.st>
dcadsp: add int8x8_fmul_int32 to DSP context

It is currently declared as a macro who is set to inlinable functions,
among which a Neon and a default C implementations.

Add a DSP parameter to each inline function, unused except by the
default C implementation which calls a function from the DSP context.

On an Arrandale CPU, gain for an inlined SSE2 function vs. a call:
- Win32: 29 to 26 cycles
- Win64: 25 to 23 cycles
x86: dcadsp: implement int8x8_fmul_int32

For the callable function (as opposed to the inline one):
         C  SSE  SSE2  SSE4
Win32:  47   42   29    26
Win64:  30   33   25    23
The SSE version is neither compiled nor set for ARCH_X86_64, as the
inlinable function takes over.
dcadsp: split lfe_dir cases

The x86 runs short on registers because numerous elements are not static.
In addition, splitting them allows more optimized code, at least for x86.
x86: dcadsp: implement SSE lfe_dir

Results for Arrandale/Windows:
32: 1670 -> 316
64:  728 -> 298
dca dsp C: factorize scaling in lfe_fir

Scaling on output leads to respectively 32 or 64 multiplications, while doing
it on the input is respectively 8 or 4 multiplications. As a side note,
the trick can be used in other implementations.

Win64: 728 to 562 cycles.
dcadsp: scan coefficients linearly instead.

Win32: 1680 cycles to 1580. This change is inspired by x86 asm,
where this frees a register.
x86: synth filter float: implement SSE2 version

Timings for Arrandale:
          C    SSE
win32:  2108   334
win64:  1152   322

Factorizing the inner loop with a call/jmp is a >15 cycles cost, even with
the jmp destination being aligned.

Unrolling for ARCH_X86_64 is a 20 cycles gain.
dcadsp: split synth_filter_float

The goal is to avoid function calls within assembly which are a mess on x86.
dca: replace some memcpy by AV_COPY128
dca: factorize scaling in inverse ADPCM

The codeblock affected accounted for around 4% of the runtime on x86_64
(measured using oprofile on a Penryn).
Timings for Arrandale (gcc 4.6.1 tdm64-1 for windows):
win32: 341 -> 331
win64: 321 -> 120

The compiled loops are completely unrolled, so only unrolling the
initialization causes an improvement.
x86: float dsp: unroll SSE versions

vector_fmul and vector_fmac_scalar are guaranteed that they can process in
batch of 16 elements, but their SSE versions only does 8 at a time.

Therefore, unroll them a bit.
299 to 261c for 256 elements in vector_fmac_scalar on Arrandale/Win64.