Working on timers / threading
Implemnentation from Cortex-m3_common fails with hard fault when returning to main. CFSR indicates an Instruction bus error. Not entirely sure how to fix.
Fixed timer issue
calling naked ISR from renamed ISR (ie. isr_pendsv from SVC_Handler) to match EFM32 naming causes error in function return.
Altered thread_arch.c to take a macro for handler names. IMPORTANT: this macro must be pushed through to all other ARM based cores.