msm: dma: Moving queue_work() function within spinlock

Currently we are adding a dma command to the staged list with in a
spinlock and then adding to workqueue using queue_work after unlocking
the spinlock. With this there is chance of executing DMA commands in out
of order in below concurrency case.

Tread1                                Thread2
__msm_dmov_enqueue_cmd_ext
   spin_lock_irqsave(..)
   list_add_tail(..)
   spin_unlock_irqrestore(..)
       --PREEMPT--
                                      __msm_dmov_enqueue_cmd_ext
                                         spin_lock_irqsave(..)
                                         list_add_tail(..)
                                         spin_unlock_irqrestore(..)
                                         queue_work()
                                         ..
   queue_work()
So adding queue_work with in spin_lock will make sure that the
work added in the work_queue is processed in the same order as they
are added in staged_commands.

CRs-Fixed: 423190
Change-Id: I2ffd1327fb5f0cd1f06db7de9c026d1c4997fe4d
Acked-by: Gopi Krishna Nedanuri <gnedanur@qti.qualcomm.com>
Signed-off-by: Utsab Bose <ubose@codeaurora.org>
msm: memory: Use phys_addr_t for memory reservation code

When reserving memory, the reserved regions may be placed above
a 32-bit address on LPAE based systems. Adjust the reservation code to
account for this.

Change-Id: If7e1775352d2557106cca0b50caec3d5134e0174
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>

Conflicts:
	arch/arm/mach-msm/board-8064.c
	arch/arm/mach-msm/board-8930.c
	arch/arm/mach-msm/board-8960.c
	arch/arm/mach-msm/board-8974.c
	arch/arm/mach-msm/board-msm8x60.c
	arch/arm/mach-msm/board-zinc.c
msm: memory: Use phys_addr_t as the return type for ebi functions

On LPAE systems, ebi allocations may be greater than 32-bits.
Use phys_addr_t as the return type for these allocations.

Change-Id: I35a4f66d2c322869f2619253f99f339b6de7464a
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
msm: memory: Add memblock_reserve bindings to dt reserve code

Drivers may wish to just reserve a block of memory in addition to
removing it or adding a size to a general pool. Update the DT
scanning code to scan for these bindings and reserve the memory.

Change-Id: Ic55c4271670a655f26a11d47a0d64cc525f9bfb2
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
msm: Add support for multiple memory holes

If a target supports multiple memory holes, the base address and
size of the memory holes are represented as an array of tuples.
The device tree is scanned in order to extract these values and
remove the memory.

Change-Id: Id253112a384b7f64be067636e5bffc69e3950fb5
Signed-off-by: Neeti Desai <neetid@codeaurora.org>