Make XCoreSelectionDAGInfo take a DataLayout since it only needs
that information.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212146 91177308-0d34-0410-b5e6-96231b3b80d8
Move the subtarget dependent features from XCoreTargetMachine
down to the subtarget.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212147 91177308-0d34-0410-b5e6-96231b3b80d8
Remove the recommendation against using std::function

Clang-cl supports MSVC-style RTTI now, and we can even compile
typeid(...) with /GR-.  Just don't instantiate std::function with a
polymorphic type, or bad things will happen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212148 91177308-0d34-0410-b5e6-96231b3b80d8
Remove the cached InstrItineraryData on the TargetMachine, it's unnecessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212149 91177308-0d34-0410-b5e6-96231b3b80d8
Remove unnecessary include.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212150 91177308-0d34-0410-b5e6-96231b3b80d8
Move MipsJITInfo to the subtarget rather than the target machine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212151 91177308-0d34-0410-b5e6-96231b3b80d8
Unify these two lines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212152 91177308-0d34-0410-b5e6-96231b3b80d8
Break out subtarget initialization that dependent variables need into
a separate function and clean up calling convention for helper function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212153 91177308-0d34-0410-b5e6-96231b3b80d8
[x86] Clean up and modernize the doxygen and API comments for the vector
operation legalization code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212155 91177308-0d34-0410-b5e6-96231b3b80d8
[cleanup] Nuke the 'VectorOp' bit of the promote method names.

This doesn't add any information for methods in the VectorLegalizer
class that clearly take SDAG operations to legalize.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212157 91177308-0d34-0410-b5e6-96231b3b80d8
[cleanup] Hoist the promotion dispatch logic into the promote function
so that we can use return to express it more cleanly and avoid so many
nested switch statements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212158 91177308-0d34-0410-b5e6-96231b3b80d8
[cleanup] Remove dead 'break;' statements that I meant to nuke in
r212158 but missed.

Thanks to Craig for spotting the goof!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212159 91177308-0d34-0410-b5e6-96231b3b80d8
aarch64: support target-specific .req assembler directive

Based on the support for .req on ARM. The aarch64 variant has to keep track if
the alias register was a vector register (v0-31) or a general purpose or
VFP/Advanced SIMD ([bhsdq]0-31) register.

Patch by Janne Grunau!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212161 91177308-0d34-0410-b5e6-96231b3b80d8
Add range for-loop iterator adapter for cases in SwitchInst.

Patch by Marcello Maggioni, reviewed by Reid Kleckner.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212163 91177308-0d34-0410-b5e6-96231b3b80d8
InstCombine: Don't turn -(x/INT_MIN) -> x/INT_MIN

It is not safe to negate the smallest signed integer, doing so yields
the same number back.

This fixes PR20186.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212164 91177308-0d34-0410-b5e6-96231b3b80d8
InstCombine: Add a vector variant test for PR20186

No functional change, just adding more test coverage that was meant to
go in with r212164.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212165 91177308-0d34-0410-b5e6-96231b3b80d8
[cleanup] Hoist an if-else chain on ISD opcodes (really designed for
switches) into a switch, and sink them into a dispatch function that can
return the result rather than awkward variable setting with breaks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212166 91177308-0d34-0410-b5e6-96231b3b80d8
InstCombine: Optimize x/INT_MIN to x==INT_MIN

The result of x/INT_MIN is either 0 or 1, we can just use an icmp
instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212167 91177308-0d34-0410-b5e6-96231b3b80d8
Fix missing const

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212168 91177308-0d34-0410-b5e6-96231b3b80d8
Move operator[] to DomTreeNodeBase

The comment in base even refers to it, but it was only defined
in the subclass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212169 91177308-0d34-0410-b5e6-96231b3b80d8