CHROMIUM: ARM: dts: nyan: lower cros-ec SPI bus frequency

Failures have been observed on other platforms with frequencies
of >3.25Mhz, so lower it down to 3Mhz.

BUG=chrome-os-partner:24261
TEST=Build and boot on Big

Change-Id: I047ec8c092a7992a2e04b1dedf03c349f1282ed0
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/194977
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
(cherry picked from commit f7517bc5b4ab5a2e5971ed075f98f150e3f25167)
Reviewed-on: https://chromium-review.googlesource.com/197023
CHROMIUM: ASoC: Intel: Fix audio crash due to race condition
 in stream deletion

Panic log:

<5>[  170.571367] general protection fault: 0000 [#1] SMP
<0>[  170.574565] gsmi: Log Shutdown Reason 0x03
<5>[  170.574610] Modules linked in: i2c_dev snd_hda_codec_hdmi snd_hda_intel snd_hda_codec snd_soc_sst_byt_max98090_mach dptf_acpi esif_lf_driver snd_soc_sst_baytrail_pcm snd_soc_sst_dsp memconsole snd_soc_max98090 snd_hwdep snd_soc_sst_acpi zram(C) fuse nf_conntrack_ipv6 nf_defrag_ipv6 ip6table_filter ip6_tables iwlmvm iwl7000_mac80211 iwlwifi cfg80211 btusb bluetooth uvcvideo videobuf2_vmalloc videobuf2_memops videobuf2_core videodev joydev
<5>[  170.576243] CPU: 1 PID: 1689 Comm: irq/29-AudioDSP Tainted: G         C   3.10.18 #1
<5>[  170.576293] Hardware name: GOOGLE Clapper, BIOS Google_Clapper.5216.171.0 04/14/2014
<5>[  170.576346] task: ffff8800714142f0 ti: ffff88005a0da000 task.ti: ffff88005a0da000
<5>[  170.576395] RIP: 0010:[<ffffffffc01cbb62>]  [<ffffffffc01cbb62>] sst_byt_dsp_suspend_noirq+0x13b/0x378 [snd_soc_sst_baytrail_pcm]
<5>[  170.576500] RSP: 0018:ffff88005a0dbdc8  EFLAGS: 00010093
<5>[  170.576546] RAX: 0000000000000001 RBX: ffff880065d8b628 RCX: ffff88005ab36638
<5>[  170.576597] RDX: dead000000100100 RSI: 0000000000000040 RDI: ffffc90021940000
<5>[  170.576646] RBP: ffff88005a0dbdf8 R08: ffff88005a0da000 R09: 0000000000000000
<5>[  170.576695] R10: 0000000006db4000 R11: ffff88007ac92d88 R12: ffff88005ab36628
<5>[  170.576744] R13: ffff880065d8b628 R14: 0000000000000246 R15: ffff880065d8b630
<5>[  170.576796] FS:  0000000000000000(0000) GS:ffff88007ac80000(0000) knlGS:0000000000000000
<5>[  170.576845] CS:  0010 DS: 0000 ES: 0000 CR0: 000000008005003b
<5>[  170.576890] CR2: 00003a50450da000 CR3: 0000000072138000 CR4: 00000000001007e0
<5>[  170.576941] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
<5>[  170.576990] DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400
<5>[  170.577036] Stack:
<5>[  170.577080]  ffff880071414758 ffff88005b912600 ffff88007839a000 ffff8800714142f0
<5>[  170.577324]  ffffffff96887a41 ffff8800714142f0 ffff88005a0dbe20 ffffffff96887a5e
<5>[  170.577569]  ffff88005b912600 ffff88005b912600 ffff88007839a000 ffff88005a0dbe98
<5>[  170.577816] Call Trace:
<5>[  170.577888]  [<ffffffff96887a41>] ? free_irq+0x8a/0x8a
<5>[  170.577945]  [<ffffffff96887a5e>] irq_thread_fn+0x1d/0x3d
<5>[  170.578000]  [<ffffffff96887614>] irq_thread+0xfd/0x1f7
<5>[  170.578058]  [<ffffffff96d0a942>] ? __schedule+0x4b0/0x592
<5>[  170.578114]  [<ffffffff96887074>] ? kzalloc.constprop.37+0x1c/0x1c
<5>[  170.578171]  [<ffffffff96887517>] ? irq_thread_check_affinity+0x8a/0x8a
<5>[  170.578228]  [<ffffffff96850b26>] kthread+0xae/0xb6
<5>[  170.578285]  [<ffffffff96850a78>] ? __kthread_parkme+0x65/0x65
<5>[  170.578341]  [<ffffffff96d0c41c>] ret_from_fork+0x7c/0xb0
<5>[  170.578395]  [<ffffffff96850a78>] ? __kthread_parkme+0x65/0x65
<5>[  170.578440] Code: fa 81 0f 84 8b 00 00 00 80 fa 97 0f 85 f1 01 00 00 49 8b 54 24 10 48 c1 e8 08 49 8d 4c 24 10 83 e0 1f 48 39 ca 0f 84 d7 01 00 00 <39> 82 f8 00 00 00 74 05 48 8b 12 eb ea 48 85 d2 0f 84 c1 01 00
<1>[  170.581678] RIP  [<ffffffffc01cbb62>] sst_byt_dsp_suspend_noirq+0x13b/0x378 [snd_soc_sst_baytrail_pcm]
<5>[  170.581787]  RSP <ffff88005a0dbdc8>
<4>[  170.581837] ---[ end trace 9ae02a41a93d9247 ]---

sound/soc/intel/sst-baytrail-ipc.c:229

static struct sst_byt_stream *sst_byt_get_stream(struct sst_byt *byt,
						 int stream_id)
{
	struct sst_byt_stream *stream;

	list_for_each_entry(stream, &byt->stream_list, node) {
		if (stream->str_id == stream_id)  // <- line 229
			return stream;
	}

	return NULL;
}

There is a race between sst_byt_stream_free() and sst_byt_get_stream()
if sst_byt_get_stream() called from sst_byt_irq_thread() context is
accessing the byt->stream_list while a stream is deleted from the list.

A stream is added to byt->stream_list in sst_byt_stream_new() and deleted in
sst_byt_stream_free(). sst_byt_get_stream() is always protected by
sst->spinlock, but the stream addition and deletion are not protected.

The patch adds spinlock to both stream addition and deletion.

[Jarkko: Same fix added to sst-haswell-ipc.c too]

BUG=chrome-os-partner:27511
TEST=Test suspend/resume manually to confirm operation

Change-Id: Id33f739fb2dfc941c2adf185ad467eee5e4ee22e
Signed-off-by: Wenkai Du <wenkai.du@intel.com>
Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Reviewed-on: https://chromium-review.googlesource.com/196515
Reviewed-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Derek Basehore <dbasehore@chromium.org>
(cherry picked from commit 561b0233525bc1a6d6645c467febff7deda439ef)
Reviewed-on: https://chromium-review.googlesource.com/196710
Reviewed-by: Bernie Thompson <bhthompson@chromium.org>
Commit-Queue: Bernie Thompson <bhthompson@chromium.org>
Tested-by: Bernie Thompson <bhthompson@chromium.org>
CHROMIUM: LPE: Fix audio crash due to negative address offset

There were occasional LPE crash during reboot testing:

[   11.883364] BUG: unable to handle kernel paging request at ffffc90121700000
[   11.883380] IP: [<ffffffffc024d8bc>] sst_module_insert_fixed_block+0x24f/0x26d [snd_soc_sst_dsp]
[   11.883397] PGD 7800b067 PUD 0
[   11.883405] Oops: 0002 [#1] SMP
[   11.886418] gsmi: Log Shutdown Reason 0x03

The virtual address, ffffc90121700000, was out of range. The virtual
address is calculated by adding LPE base address with an offset:

sst_memcpy32(dsp->addr.lpe + data->offset, data->data, data->size);

The offset is calculated in sst_byt_parse_module, by subtraction of
two virtual addresses dsp->addr.fw_ext and dsp->addr.lpe:

block_data.offset = block->ram_offset + (dsp->addr.fw_ext - dsp->addr.lpe);

These virtual addresses are assigned by kernel from ioremap:

sst->addr.lpe = ioremap(pdata->lpe_base, pdata->lpe_size);
sst->addr.fw_ext = ioremap(pdata->fw_base, pdata->fw_size);

In current driver code, offset is defined as unsigned int32:

struct sst_module_data {
...
	u32 offset;		/* offset in FW file */
};

Most of the time kernel assigned virtual addresses with addr.fw_ext
greater than addr.lpe. But sometimes it was the other way round.

Fix the problem by declaring offset as signed int32_t.

BUG=chrome-os-partner:28168
TEST=Test reboot on Rambi.

Change-Id: I050dd8d61e7249a94b4316d3f552459938147c9c
Signed-off-by: Wenkai Du <wenkai.du@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/195626
Reviewed-by: Benson Leung <bleung@chromium.org>
Tested-by: Bernie Thompson <bhthompson@chromium.org>
(cherry picked from commit efbd4ee43769df064881552cadf7289f177ddc04)
Reviewed-on: https://chromium-review.googlesource.com/196721
Commit-Queue: Bernie Thompson <bhthompson@chromium.org>
CHROMIUM: nyan: modify panel on/off sequences

Panel datasheet defines some delay between PWM signal out and
backlight enable/disable. This change fixes the current sequences
and makes the delays adjustable by dt setting.

BUG=chrome-os-partner:28008
TEST=emerged kernel, booted successfully and panel works fine.
the measurement of power on/off sequences meets panel requirements.

Change-Id: I47c1a7446852ac4d522a0e09bc132adb5f127265
Signed-off-by: Ken Chang <kenc@nvidia.com>
Reviewed-on: https://chromium-review.googlesource.com/194507
Reviewed-by: Miles Chen <MilesDY_Chen@compal.com>
Tested-by: Miles Chen <MilesDY_Chen@compal.com>
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Commit-Queue: Andrew Bresticker <abrestic@chromium.org>
(cherry picked from commit a29894aca85b9c4cbf01cd41b2f3e1a31b0fe373)
Reviewed-on: https://chromium-review.googlesource.com/197120
Tested-by: Andrew Bresticker <abrestic@chromium.org>
CHROMIUM: ARM: dts: big: Add panel timings

Add delays between:
1. PWM signal on and backlight enable
2. backlight disable and PWM signal off

BUG=chrome-os-partner:28008
TEST=panel worked fine and the measurement waveforms meet
panel requirements.

Change-Id: I68ea642ad907da7bd07c616f0a30af2d5d17785a
Signed-off-by: Ken Chang <kenc@nvidia.com>
Reviewed-on: https://chromium-review.googlesource.com/194527
Reviewed-by: Miles Chen <MilesDY_Chen@compal.com>
Tested-by: Miles Chen <MilesDY_Chen@compal.com>
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Commit-Queue: Andrew Bresticker <abrestic@chromium.org>
(cherry picked from commit 746eaf41f88979734b92d7c5ba0bd7d9e56393bd)
Reviewed-on: https://chromium-review.googlesource.com/197121
Tested-by: Andrew Bresticker <abrestic@chromium.org>
CHROMIUM: ARM: dts: big: Increase PWM to backlight on delay.

Increase the delay from PWM signal on to backlight enable so
that the panel spec for idle mode is met.

BUG=chrome-os-partner:28008
TEST=panel worked fine and the measurement waveforms meet
panel requirements.

Change-Id: Ic1106c565e7a56707be3c8c1c0feb33bfed55506
Signed-off-by: MilesDY_Chen <MilesDY_Chen@compal.com>
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/196200
(cherry picked from commit bb6d2a8c5695c7c114ad4baf18c97b3aa2fb0b39)
Reviewed-on: https://chromium-review.googlesource.com/197122
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Commit-Queue: Andrew Bresticker <abrestic@chromium.org>
Tested-by: Andrew Bresticker <abrestic@chromium.org>
CHROMIUM: drivers/rtc/rtc-as3722: correct month value

The RTCmonth value is 1-indexed, but the kernel assumes it is 0-indexed.
This may result in the RTC not rolling over correctly.

BUG=chrome-os-partner:28297
TEST=check the register RTCmonth 0x65 using regmap

Change-Id: I210c99762e94d288b43a4c9eb70216246b2440b2
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: https://chromium-review.googlesource.com/196808
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Commit-Queue: Andrew Bresticker <abrestic@chromium.org>
Tested-by: Andrew Bresticker <abrestic@chromium.org>
(cherry picked from commit 9ce8d10f39c441642fba58ab8248d78951cec7a7)
Reviewed-on: https://chromium-review.googlesource.com/197350
CHROMIUM: ASoC: Intel: Fix pcm stream context restore crash

In some cases the pcm stream is being closed while context is
being restored, causing a null pointer deref panic. Take pcm
lock and check for null pointer to ensure stream does not get
closed while worker threads are still active/pending.

BUG=chrome-os-partner:27531
TEST=Manual: Check for suspend/resume crash

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>

Change-Id: I9eff12be3ae763a347b5dee1516012d838cc19f9
Reviewed-on: https://chromium-review.googlesource.com/195767
Reviewed-by: Benson Leung <bleung@chromium.org>
Commit-Queue: Kevin Strasser <kevin.strasser@intel.com>
Tested-by: Kevin Strasser <kevin.strasser@intel.com>
(cherry picked from commit f306e04d2a25e0903727162f678e5928a0d5036d)
Reviewed-on: https://chromium-review.googlesource.com/197373
Reviewed-by: Derek Basehore <dbasehore@chromium.org>
Commit-Queue: Bernie Thompson <bhthompson@chromium.org>
Tested-by: Bernie Thompson <bhthompson@chromium.org>
CHROMIUM: Input: elan_i2c - Fine tune the reset timing and fetch data when IAP finish.

Adjust the wait timing from 200ms to 300ms when reset TP and remove the buffer
comparition when fetch the data after TP reset.

Beside, because the firmware take care of initialization flow after IAP finish,
remove initialization flow from driver. This change will redouce the communiction
between the driver and firmware, and can cut down the risk about the I2C fail.

Signed-off-by: Duson Lin <dusonlin@emc.com.tw>
BUG=chrome-os-partner:27458
TEST=on chromebook with Elan touchpad, boot and touchpad works.

Change-Id: I7a96331864020b7d7c464253a8290ff5df8c309b
Reviewed-on: https://chromium-review.googlesource.com/194512
Reviewed-by: Benson Leung <bleung@chromium.org>
Tested-by: Bernie Thompson <bhthompson@chromium.org>
Commit-Queue: Bernie Thompson <bhthompson@chromium.org>
(cherry picked from commit 70741d4c5ff4ff2e27483e5f26dc0e6eb8a210da)
Reviewed-on: https://chromium-review.googlesource.com/198398
Reviewed-by: Bernie Thompson <bhthompson@chromium.org>
Commit-Queue: Benson Leung <bleung@chromium.org>
Tested-by: Benson Leung <bleung@chromium.org>
CHROMIUM: iwl7000: do not sched scan while associated

Currently the FW doesn't support sched scan while associated,
so prevent it.

BUG=chrome-os-partner:28055
TEST=run various scenarios that previously resulted in sysassert
due to scheduled scan

Change-Id: I9d223316164fceb8cc1cae9e1e014599f7ab4c9b
Signed-off-by: David Spinadel <david.spinadel@intel.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/197001
Reviewed-by: Paul Stewart <pstew@chromium.org>
(cherry picked from commit 5e02ed1698f61cfbf71d51c0dc6ba23d5260da54)
Reviewed-on: https://chromium-review.googlesource.com/197986
Commit-Queue: Paul Stewart <pstew@chromium.org>
Tested-by: Paul Stewart <pstew@chromium.org>
CHROMIUM : DPTF update to v8.0.11

	Timer synchronization fixes.

BUG=chromium:359295
TEST=Manually tested
CQ-DEPEND=CL:198670

Change-Id: I1d556dc6d37d1c566f0b59874539ff557ee7dd94
Signed-off-by: Brad Geltz <brad.geltz@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/197168
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: Duncan Laurie <dlaurie@chromium.org>
(cherry picked from commit 7198a1dab1ae3743025259c49a6d751c546cc1ff)
Reviewed-on: https://chromium-review.googlesource.com/198671
Commit-Queue: Duncan Laurie <dlaurie@chromium.org>
CHROMIUM: iwl7000: add uapsd_disable module parameter

Some APs (e.g. TP-LINK TL-WA801N) are disabling aggregation (downlink
to station) when U-APSD is enabled, resulting in low throughput.
Add a module parameter to allow disabling U-APSD support in the driver.

BUG=chrome-os-partner:27440
TEST=run throughput test again affected AP with and without uAPSD

Change-Id: I35591b33a0b44de9724ee9e091228443344b7785
Signed-off-by: Matt Chen <matt.chen@intel.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/197032
Reviewed-by: Paul Stewart <pstew@chromium.org>
(cherry picked from commit df86acbb7ec0825a78efee1ef42a71725445a76e)
Reviewed-on: https://chromium-review.googlesource.com/198241
Commit-Queue: Paul Stewart <pstew@chromium.org>
Tested-by: Paul Stewart <pstew@chromium.org>
CHROMIUM: iwl7000: fix uapsd_disable module parameter

Later versions of the driver have uAPSD enabled unconditionally,
so the backported patch introduced an error. Fix this.

BUG=chrome-os-partner:27440
TEST=run throughput test again affected AP with and without uAPSD

Change-Id: I00dcfe148f565285be80ffa65769ff3e0bd617f3
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/198340
Reviewed-by: Matt Chen <matt.chen@intel.com>
Tested-by: Matt Chen <matt.chen@intel.com>
Reviewed-by: Paul Stewart <pstew@chromium.org>
(cherry picked from commit cb72baaefccd42bf8e2495b472d7585fa8d46453)
Reviewed-on: https://chromium-review.googlesource.com/199029
Commit-Queue: Paul Stewart <pstew@chromium.org>
Tested-by: Paul Stewart <pstew@chromium.org>
BACKPORT: drm/i915/vlv: Make the vlv_dpio_read/vlv_dpio_write more PHY centric

vlv_dpio_read/write should be describe more in PHY centric instead of
display controller centric.
Create a enum dpio_channel for channel index and enum dpio_phy for PHY
index.  This should better to gather for upcoming platform.

v2: Rebase the code based on
drm/i915/vlv: Fix typo in the DPIO register define.

v3: Rename vlv_phy to dpio_phy_iosf_port and define additional macro
DPIO_PHY, and remove unrelated change. (Ville)

Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Chon Ming Lee <chon.ming.lee@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(picked from commit e4607fcfb1cd5d869425e190a85f841fc910c4ca)
(picked from drm-intel-nightly repo at http://anongit.freedesktop.org/git/drm-intel.git)

Signed-off-by: Joon Jung <joon.jung@intel.com>

BUG=chrome-os-partner:28278
TEST=by hand on glimmer: using the glimmer unit which shows a blank
display with link train error on cold boot

Change-Id: I1f0f867dd247ef3577fe9299d4f40fc37b4a2d9a
Reviewed-on: https://chromium-review.googlesource.com/197803
Reviewed-by: Joon Jung <joon.jung@intel.com>
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Reviewed-by: Bernie Thompson <bhthompson@chromium.org>
Tested-by: Joon Jung <joon.jung@intel.com>
Commit-Queue: Bernie Thompson <bhthompson@chromium.org>
(cherry-picked from a8f177ff7fc17d6b32ca81f2bd4b41c1dfaf8195)
Reviewed-on: https://chromium-review.googlesource.com/199110
Tested-by: Bernie Thompson <bhthompson@chromium.org>
BACKPORT: drm/i915/vlv: add early DPIO init v3

Just add an early init since we may need to access DPIO regs early on.
The init call in modeset_init_hw is also needed for the resume case,
when we need to reset DPIO to keep things happy.

v2: split reset and reg init
v3: split patches (Daniel)

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(picked from commit f42bb70d4ff976b134fcbfb50301a87e7523f042)
(picked from drm-intel-nightly repo at http://anongit.freedesktop.org/git/drm-intel.git)

Signed-off-by: Joon Jung <joon.jung@intel.com>

BUG=chrome-os-partner:28278
TEST=by hand on glimmer: using the glimmer unit which shows a blank
display with link train error on cold boot

Change-Id: I45619f8ce6fbd41f8bb0793469149b810f82ca53
Reviewed-on: https://chromium-review.googlesource.com/197804
Reviewed-by: Joon Jung <joon.jung@intel.com>
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Reviewed-by: Bernie Thompson <bhthompson@chromium.org>
Tested-by: Joon Jung <joon.jung@intel.com>
Commit-Queue: Bernie Thompson <bhthompson@chromium.org>
(cherry picked from commit 5d98a81288080a9f85127fce0ebb06f9d0aa195d)
Reviewed-on: https://chromium-review.googlesource.com/199111
Tested-by: Bernie Thompson <bhthompson@chromium.org>
BACKPORT: drm/i915/vlv: split DPIO init and reset

We only need to init the reg offset for DPIO once, but we need to reset
DPIO at resume time and at init time.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(picked from commit 5382f5f35e73e5c7ac486824d1e26a2f44de0eec)
(picked from drm-intel-nightly repo at http://anongit.freedesktop.org/git/drm-intel.git)

Signed-off-by: Joon Jung <joon.jung@intel.com>

BUG=chrome-os-partner:28278
TEST=by hand on glimmer: using the glimmer unit which shows a blank
display with link train error on cold boot

Change-Id: I99a2cdad2122e43022f5f0c30300825111f7b777
Reviewed-on: https://chromium-review.googlesource.com/197805
Reviewed-by: Joon Jung <joon.jung@intel.com>
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Reviewed-by: Bernie Thompson <bhthompson@chromium.org>
Tested-by: Joon Jung <joon.jung@intel.com>
(cherry picked from commit 0a02e81f60d7259fb56c1a5a0ab49117b5d67b6c)
Reviewed-on: https://chromium-review.googlesource.com/199112
Commit-Queue: Bernie Thompson <bhthompson@chromium.org>
Tested-by: Bernie Thompson <bhthompson@chromium.org>
drm/i915/vlv: reset PHY common lane in DPIO reset

This resets the PHY common lane for the normal system boot. "DP link
train error" has been reported on cold boot with blank display.
This will fix the issue by assuring the common lane reset.

Refer to chrome-os-partner:25517 for the earlier fix for the S3
resume case.

This patch is based on the following BACKPORTs for the kernel 3.14
integration compatibility:
BACKPORT: drm/i915/vlv: Make the vlv_dpio_read/vlv_dpio_write more PHY centric
BACKPORT: drm/i915/vlv: add early DPIO init v3
BACKPORT: drm/i915/vlv: split DPIO init and reset

Signed-off-by: Joon Jung <joon.jung@intel.com>

BUG=chrome-os-partner:28278
TEST=by hand on glimmer: using the glimmer unit which shows a blank
display with link train error on cold boot

Change-Id: Ic0f352642a0441528a1bd20e4f6303af9ecd0cc6
Reviewed-on: https://chromium-review.googlesource.com/197806
Reviewed-by: Joon Jung <joon.jung@intel.com>
Reviewed-by: Ryan Lin <ryan.lin@intel.com>
Tested-by: Ryan Lin <ryan.lin@intel.com>
Reviewed-by: Bernie Thompson <bhthompson@chromium.org>
Commit-Queue: Bernie Thompson <bhthompson@chromium.org>
Tested-by: Joon Jung <joon.jung@intel.com>
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
(cherry picked from commit e687b6fcdec90902da442cf687823a4372ad65a4)
Reviewed-on: https://chromium-review.googlesource.com/199113
Tested-by: Bernie Thompson <bhthompson@chromium.org>
cfg80211: fix scheduled scan pointer access

Since rdev->sched_scan_req is dereferenced outside the
lock protecting it, this might be done at the wrong
time, causing crashes. Move the dereference to where
it should be - inside the RTNL locked section.

Cc: stable@vger.kernel.org [3.8+]
Reviewed-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
(cherry picked from commit 79845c662eeb95c9a180b9bd0d3ad848ee65b94c)
Signed-off-by: Paul Stewart <pstew@chromium.org>

Conflicts:
	net/wireless-3.8/scan.c

BUG=chrome-os-partner:28379
TEST=wifi_matfunc autotest suite

Change-Id: I9ab46b84babcd029fb938afdf4b609252c7d96f1
Reviewed-on: https://chromium-review.googlesource.com/199299
Reviewed-by: Johannes Berg <johannes.berg@intel.com>
Reviewed-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Tested-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Tested-by: Paul Stewart <pstew@chromium.org>
Commit-Queue: Paul Stewart <pstew@chromium.org>
(cherry picked from commit baf45c66ae35c64ca2211ee788a9e6c435a95d12)
Reviewed-on: https://chromium-review.googlesource.com/199568
Commit-Queue: Shawn Nematbakhsh <shawnn@chromium.org>
UPSTREAM: drm/i915: Convert DIP port switch cases to a simple macro

We have a couple of switch cases to compute the port value for the
VIDEO_DIP_CTL register. Replace them with a simple macro.

We do lose a few BUG() calls, but many people may consider that
an improvement.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit 822cdc52936e026a24c684ccc98850b251c06206)

Signed-off-by: Wayne Boyer <wayne.boyer@intel.com>

BUG=chrome-os-partner:26863
TEST=HDMI Hot-plug / Hot-unplug, HDMI plugged in reboot cycles, HDMI
plugged in suspend/resume cycles, mirroring and extending verification

Change-Id: I9b5a437ab3e7e6509676ab853afa83901a118e6b
Reviewed-on: https://chromium-review.googlesource.com/194165
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Tested-by: Wayne Boyer <wayne.boyer@intel.com>
Commit-Queue: Bernie Thompson <bhthompson@chromium.org>
(cherry picked from commit a45dbce578a712d7d454effa2cba89eb11f83ac3)
Reviewed-on: https://chromium-review.googlesource.com/199507
Tested-by: Bernie Thompson <bhthompson@chromium.org>
BACKPORT: drm/i915/vlv: write the port field in the per-pipe DIP control reg

In case we end up bouncing these around between ports.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit 6a2b8021d22a7d597bb913b0e3832ad5cdb825ca)
(cherry picked from drm-intel-nightly repo at
http://anongit.freedesktop.org/git/drm-intel)

Signed-off-by: Wayne Boyer <wayne.boyer@intel.com>

BUG=chrome-os-partner:26863
TEST=HDMI Hot-plug / Hot-unplug, HDMI plugged in reboot cycles, HDMI
plugged in suspend/resume cycles, mirroring and extending verification

Change-Id: Ic18930573a282b20c2daec7299d56af9a25a09cd
Reviewed-on: https://chromium-review.googlesource.com/194166
Tested-by: Wayne Boyer <wayne.boyer@intel.com>
Reviewed-by: Jim Bride <jim.bride@intel.com>
Reviewed-by: Bernie Thompson <bhthompson@chromium.org>
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Commit-Queue: Bernie Thompson <bhthompson@chromium.org>
(cherry picked from commit c92badb64ad2fac7a6b263c920008a611988fcf1)
Reviewed-on: https://chromium-review.googlesource.com/199508
Tested-by: Bernie Thompson <bhthompson@chromium.org>