r600g,radeonsi: don't skip the context flush if a fence should be returned

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77589
i965/fs: Only sweep NOPs if register coalescing made progress.

Otherwise there's nothing to do.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
i965/fs: Recognize nop-MOV instructions early.

And avoid rewriting other instructions unnecessarily. Removes a few
self-moves we weren't able to handle because they were components of a
large VGRF.

instructions in affected programs:     830 -> 826 (-0.48%)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
i965/fs: Unindent can_coalesce_vars().

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
i965/fs: Simplify interference scan in register coalescing.

We were starting at the beginning of the instruction list, rather than
with the MOV instruction itself. This allows us to coalesce after
control flow.

Excluding the shaders from an unreleased title, the shader-db results:

total instructions in shared programs: 1603791 -> 1594215 (-0.60%)
instructions in affected programs:     678772 -> 669196 (-1.41%)
GAINED:                                5
LOST:                                  0

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
i965/fs: Give up in interference check if we see a WHILE.

Rather than any old control flow. Muchnick's algorithm just checks for
interfering writes between the MOV and the end of the program. Handling
this when you have backward branches is hard, so don't, but there's no
reason to bail if you see forward branches.

instructions in affected programs:     4270 -> 4248 (-0.52%)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
i965/fs: Reduce restrictions on interference in register coalescing.

We previously only allowed coalescing registers that interfere (i.e.,
whose live ranges overlap) if the destination register's live range was
entirely inside the source's live range. This is unnecessary -- we only
need to check for interfering writes in the intersection of their live
ranges.

total instructions in shared programs: 1639470 -> 1638453 (-0.06%)
instructions in affected programs:     84751 -> 83734 (-1.20%)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
radeonsi: fix num banks selection on SI for dma setup (v2)

The number of banks varies based on the tile mode index
just like CIK.

Bug:
https://bugs.freedesktop.org/show_bug.cgi?id=77533

v2: fix ordering for nbanks calculation for consistency

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
glsl: Allow explicit binding on atomics again

As of 943b2d52bf5, layout(binding) on an atomic would fail the assertion
here.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
i965/fs: Implement fs_inst::force_sechalf support on Broadwell.

Back when I originally wrote this code, force_sechalf was only used for
Gen4 code, so I didn't bother hooking it up.  However, it's used more
generally these days.  In particular, we use it for computing
gl_SamplePosition.

Fixes Piglit's spec/ARB_sample_shading/builtin-gl-sample-position tests.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77222
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
mesa: update glext.h to version 20140313

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>