Changing minor template details


git-svn-id: https://ntserv1.ida.ing.tu-bs.de/svn/hwswcosim/trunk@526 d83f2ebd-4275-1f45-b601-53736ebb63cd
Adding MEMDevice to utils


git-svn-id: https://ntserv1.ida.ing.tu-bs.de/svn/hwswcosim/trunk@527 d83f2ebd-4275-1f45-b601-53736ebb63cd
Prepare the template for AT


git-svn-id: https://ntserv1.ida.ing.tu-bs.de/svn/hwswcosim/trunk@528 d83f2ebd-4275-1f45-b601-53736ebb63cd
Fix


git-svn-id: https://ntserv1.ida.ing.tu-bs.de/svn/hwswcosim/trunk@529 d83f2ebd-4275-1f45-b601-53736ebb63cd
git-svn-id: https://ntserv1.ida.ing.tu-bs.de/svn/hwswcosim/trunk@530 d83f2ebd-4275-1f45-b601-53736ebb63cd
FFT software test - initial check-in

git-svn-id: https://ntserv1.ida.ing.tu-bs.de/svn/hwswcosim/trunk@531 d83f2ebd-4275-1f45-b601-53736ebb63cd
Missing update from eslday


git-svn-id: https://ntserv1.ida.ing.tu-bs.de/svn/hwswcosim/trunk@532 d83f2ebd-4275-1f45-b601-53736ebb63cd
Template will store configurations in the template directory. So we don't need anymore the configurations directory.
FFT gets build in debug mode.


git-svn-id: https://ntserv1.ida.ing.tu-bs.de/svn/hwswcosim/trunk@533 d83f2ebd-4275-1f45-b601-53736ebb63cd
Singlecore Template Description + working fft64 on singlecore


git-svn-id: https://ntserv1.ida.ing.tu-bs.de/svn/hwswcosim/trunk@534 d83f2ebd-4275-1f45-b601-53736ebb63cd
Update for CPU AT->RTL adapter and test

git-svn-id: https://ntserv1.ida.ing.tu-bs.de/svn/hwswcosim/trunk@535 d83f2ebd-4275-1f45-b601-53736ebb63cd
MMU_CACHE - common funct if for LT and AT

git-svn-id: https://ntserv1.ida.ing.tu-bs.de/svn/hwswcosim/trunk@536 d83f2ebd-4275-1f45-b601-53736ebb63cd
Implemented dbg_transport for mmu_cache and sub-components

git-svn-id: https://ntserv1.ida.ing.tu-bs.de/svn/hwswcosim/trunk@537 d83f2ebd-4275-1f45-b601-53736ebb63cd
Bug fix for mmu_cache dbg_write

git-svn-id: https://ntserv1.ida.ing.tu-bs.de/svn/hwswcosim/trunk@538 d83f2ebd-4275-1f45-b601-53736ebb63cd
Working Trap-Gen traps and debug memmory


git-svn-id: https://ntserv1.ida.ing.tu-bs.de/svn/hwswcosim/trunk@539 d83f2ebd-4275-1f45-b601-53736ebb63cd
Implemented DCIO payload extensions for debug_transport in func_LT

git-svn-id: https://ntserv1.ida.ing.tu-bs.de/svn/hwswcosim/trunk@540 d83f2ebd-4275-1f45-b601-53736ebb63cd
grlib software tests. Refactored to work with newer compilers and integrated in our build system


git-svn-id: https://ntserv1.ida.ing.tu-bs.de/svn/hwswcosim/trunk@541 d83f2ebd-4275-1f45-b601-53736ebb63cd
Updating Doxygen file to work better with newer Doxygen Versions 


git-svn-id: https://ntserv1.ida.ing.tu-bs.de/svn/hwswcosim/trunk@542 d83f2ebd-4275-1f45-b601-53736ebb63cd
Correcting endianess code in gr_ambasockets.h


git-svn-id: https://ntserv1.ida.ing.tu-bs.de/svn/hwswcosim/trunk@543 d83f2ebd-4275-1f45-b601-53736ebb63cd
Deleeting old mctrl code to checkin the new code


git-svn-id: https://ntserv1.ida.ing.tu-bs.de/svn/hwswcosim/trunk@544 d83f2ebd-4275-1f45-b601-53736ebb63cd
New MCtrl with tests for all memmory access styles.



git-svn-id: https://ntserv1.ida.ing.tu-bs.de/svn/hwswcosim/trunk@545 d83f2ebd-4275-1f45-b601-53736ebb63cd