Preserve x19-x29 across world switch for exception handling

In the current exception handlers in BL3-1, X19-X29 are not saved
and restored on every SMC/trap into EL3. Instead these registers
are 'saved as needed' as a side effect of the A64 ABI used by the C
compiler.

This approach fails when world switching but is currently not visible
with the current TSP/TSPD code because the TSP is 64-bit, does not
clobber these registers when running and does not support pre-emption
by normal world interrupts. Any one of those scenarios would show
that the values in these registers can be passed through a world
switch, which breaks the normal and trusted world assumptions
about these registers being preserved.

Ideally we would only save and restore these registers when a
world switch occurs - but that type of implementation is more complex.
So initially solution will to always save and restore these registers
on entry and exit of EL3.

Fixes ARM-software/tf-issues#141

Change-Id: I9a727167bbc594454e81cf78a97ca899dfb11c27