Fix test_forward
Fix timing for MEMORY.

CW3 is latched and flip-flop'd: the first goes to ALU, the 2nd continues the pipe for cws.
Also, ALU_OUT is latched when entering the ALU and flip-flop'd for pipeline constraints.
IRAM reads the full code address now (there were 2 bits missing - caused by truncation).

Add final instructions into IRAM to fill memory - missing cells are filled with J -4 (i.e. stay still).
S3 must be taken from clocked cw3 as it is input to a non-clocked circuit
flush must be done for 3 clock cycles, not 2
Latch memory immediate input
VERY YO MUST INCREDIBLE ULTRA SUPER DIFFICULT TEST

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