lzo: properly check for overruns

commit 206a81c18401c0cde6e579164f752c4b147324ce upstream.

The lzo decompressor can, if given some really crazy data, possibly
overrun some variable types.  Modify the checking logic to properly
detect overruns before they happen.

Change-Id: Ibe2b5df5f5b3704796e3845a1405b09b51735cf4
Reported-by: "Don A. Bailey" <donb@securitymouse.com>
Tested-by: "Don A. Bailey" <donb@securitymouse.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
kernel:sched: LOAD_FREQ (4*HZ+61) avoids loadavg Moire

LOAD_FREQ is (5*HZ+1) to avoid high load average when idle:
http://kerneltrap.org/mailarchive/linux-kernel/2007/10/3/328568

I suggest (4*HZ+61) for a better distribution.

With some seconds based load (like SSL heartbeats)
and LOAD_FREQ at (5*HZ+1) I see Moire patterns like inverse sawtooth,
since 2 or 3 probes hit the jobs (load increases quickly),
followed by several probes missing it.

A 4.61 sec interval gives optimal distribution over when within a
second a probe is taken, as .61 is close to golden ratio phi 1.618...
(test in http://ripke.com/goldenratio.c).

12*4.61 = 55.32 secs is still close to a minute,
and 13*4.61=59.93 is even closer than the current 12*5.01=60.12
(with exponents EXP_x adjusted to a ratio of 13 instead of 12).

Change-Id: Ibad59fe4e5eea2655125ab64810ad6d9e24acc97
sched: clock wrap bug in 2.6.35-stable kills scheduling

Change-Id: I454d8ced19b266d422d7357743e0cb29ba9cc9c5
ARM: 7007/1: Prevent ignoring of faults with ARMv6 unaligned access model

Currently, it's possible to set the kernel to ignore alignment
faults when changing the alignment fault handling mode at runtime
via /proc/sys/alignment, even though this is undesirable on ARMv6
and above, where it can result in infinite spins where an un-fixed-
up instruction repeatedly faults.

In addition, the kernel clobbers any alignment mode specified on
the command-line if running on ARMv6 or above.

This patch factors out the necessary safety check into a couple of
new helper functions, and checks and modifies the fault handling
mode as appropriate on boot and on writes to /proc/cpu/alignment.

Prior to ARMv6, the behaviour is unchanged.

For ARMv6 and above, the behaviour changes as follows:

  * Attempting to ignore faults on ARMv6 results in the mode being
    forced to UM_FIXUP instead.  A warning is printed if this
    happened as a result of a write to /proc/cpu/alignment.  The
    user's UM_WARN bit (if present) is still honoured.

  * An alignment= argument from the kernel command-line is now
    honoured, except that the kernel will modify the specified mode
    as described above.  This is allows modes such as UM_SIGNAL and
    UM_WARN to be active immediately from boot, which is useful for
    debugging purposes.

Signed-off-by: Dave Martin <dave.martin@linaro.org>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
earysuspend: speedup late resume (faster wakeup of the device)

Thanx to _2bad4u_ for the hint and dsc-team's repo I got the code from (https://github.com/dsc-team/dsc-team-kernel-project)

Conflicts:
	kernel/power/Kconfig
	kernel/power/earlysuspend.c

Change-Id: I649e6faa722773029119e060ddc06531fa16969e
add cm branding to kernel local version

Also fixes 'KERNEL_LOCAL_VERSION: command not found' warning.
https://www.codeaurora.org/gitweb/quic/le/?p=kernel/msm.git;a=commit;h=230e3e5c8362f917cb09b9c928944cb57e1048ad

Change-Id: Icf91c4b042d19f745231bd8f12c55b14be821c56
Blade: Add recovery defconfig

required for recovery builds (eng)
add lzma compression support

Change-Id: I4781523e774253cd8c31d55387f4a6b3a554cfc8
Update defconfig for TLS

Change-Id: I7b08a4157351712fc3c4bc5ab4a82f78b9b19b9d
enable EXT4 FS security

Change-Id: Id3711cf8338e1dfeea6460c72d48b30ec6173c80
defconfig: enable CONFIG_SPEEDUP_KEYRESUME

Change-Id: I3997ea98ebbc503f1f6fbdcea5b9ebf028250b08
sched_fair: Reduce latencies
Replace CONFIG_HAS_TLS_REG with HWCAP_TLS and check for it on V6

The TLS register is only available on ARM1136 r1p0 and later.
Set HWCAP_TLS flags if hardware TLS is available and test for
it if CONFIG_CPU_32v6K is not set for V6.

Note that we set the TLS instruction in __kuser_get_tls
dynamically as suggested by Jamie Lokier <jamie@shareable.org>.

Also the __switch_to code is optimized out in most cases as
suggested by Nicolas Pitre <nico@fluxnic.net>.

Signed-off-by: Tony Lindgren <(address hidden)>
Reviewed-by: Nicolas Pitre <(address hidden)>

Change-Id: I10ec5a51e87017feaa8067cd3b278106aaea04cb
HACK stay compatible with the emulated TLS register HACK

psyke83: wrap hack into CONFIG_TLS_USERSPACE_EMUL option

Signed-off-by: Pankaj <pankaj.bharadiya@ti.com>

Change-Id: I24c45b5e0390fe2c56c2f810ca380b32a389a7d9