sched/cpuidle: reduce IPI store. Backport upstream 3.16 scheduler updates

Change-Id: I95f16152b6e4c2aacadf33467012477cb677fc57
squash intelli_plug: intelligent hotplug cpu driver with eco mode

Change-Id: I114eb069df88eb1dd3cf899be2f1ee6d3dcd9843
sched/cpuidle: reduce IPI store. Backport upstream 3.16 scheduler updates

Change-Id: I95f16152b6e4c2aacadf33467012477cb677fc57
squash intelli_plug: intelligent hotplug cpu driver with eco mode

Change-Id: I114eb069df88eb1dd3cf899be2f1ee6d3dcd9843
Update defconfig

* Enable intelliplug
* Enable bfq scheduler

Change-Id: I679bda9b98cce6f8312652a7a05f2f66cb4494fc
Makefile: some Linaro gcc 4.9 optimizations

Change-Id: I58a8eaef3ad2c93813db1da2c82e635636eee205
msm: Fix high load average from uninterruptible waits

 * The load average on all MSMs is currently hovering at around 14
   due to uninterruptible waits in various places.
 * Convert these waits to interruptible waits to bring the load
   back down to zero at idle.

Change-Id: I14bad4af135b1594e235e2252cb484cb34d91054
ARM: move AES typedefs and function prototypes to separate header

Put the struct definitions for AES keys and the asm function prototypes in a
separate header and export the asm functions from the module.
This allows other drivers to use them directly.

Change-Id: I99bc61828dedf65676f54c07ea9b3143939975b7
ARM: add support for bit sliced AES using NEON instructions

Bit sliced AES gives around 45% speedup on Cortex-A15 for encryption
and around 25% for decryption. This implementation of the AES algorithm
does not rely on any lookup tables so it is believede to be invulnerable
to cache timing attacks.

This algorithm processes up to 8 blocks in parallel in constant time. This
means that it is not usable by chaining modes that are strictly sequential
in nature, such as CBC encryption. CBC decryption, however, can benefit from
this implementation and runs about 25% faster. The other chaining modes
implemented in this module, XTS and CTR, can execute fully in parallel in
both directions.

The core code has been adopted from the OpenSSL project (in collaboration
with the original author, on cc). For ease of maintenance, this version is
identical to the upstream OpenSSL code, i.e., all modifications that were
required to make it suitable for inclusion into the kernel have been made
upstream. The original can be found here:

    http://git.openssl.org/gitweb/?p=openssl.git;a=commit;h=6f6a6130

Note to integrators:
While this implementation is significantly faster than the existing table
based ones (generic or ARM asm), especially in CTR mode, the effects on
power efficiency are unclear as of yet. This code does fundamentally more
work, by calculating values that the table based code obtains by a simple
lookup; only by doing all of that work in a SIMD fashion, it manages to
perform better.

Change-Id: Ic884c59eb3a9a37df5f947cdffc49f8f066fddbc
Cc: Andy Polyakov <appro@openssl.org>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
ARM: add .gitignore entry for aesbs-core.S

This avoids this file being incorrectly added to git.

Change-Id: I440c71e294e99130d93ba05d2ac1c40fed11934c
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
CRYPTO: Fix more AES build errors

Building a multi-arch kernel results in:

arch/arm/crypto/built-in.o: In function `aesbs_xts_decrypt':
sha1_glue.c:(.text+0x15c8): undefined reference to `bsaes_xts_decrypt'
arch/arm/crypto/built-in.o: In function `aesbs_xts_encrypt':
sha1_glue.c:(.text+0x1664): undefined reference to `bsaes_xts_encrypt'
arch/arm/crypto/built-in.o: In function `aesbs_ctr_encrypt':
sha1_glue.c:(.text+0x184c): undefined reference to `bsaes_ctr32_encrypt_blocks'
arch/arm/crypto/built-in.o: In function `aesbs_cbc_decrypt':
sha1_glue.c:(.text+0x19b4): undefined reference to `bsaes_cbc_encrypt'

This code is already runtime-conditional on NEON being supported, so
there's no point compiling it out depending on the minimum build
architecture.

Change-Id: I8ff59b1641423cc7d88d25cd734f7e706441b26c
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Revert "Setting correct HW crypto driver instance for FDE"

This reverts commit 768165b5a9389663c9a372b9bf2a57bdab37222b.

Change-Id: Idb27cebfc37a4f5860793e61c18a1c350d92726d
crypto: arm-aes - fix encryption of unaligned data

commit f3c400ef473e00c680ea713a66196b05870b3710 upstream.

Fix the same alignment bug as in arm64 - we need to pass residue
unprocessed bytes as the last argument to blkcipher_walk_done.

Change-Id: I0fc707219c95b502cc5038fac6c84330306dc591
Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
dm: crypto: allow complete disabling of HW crypto driver

Change-Id: I1b263cd06084bb020158d8acc1171cba428e5d76
ARM: move VFP init to an earlier boot stage

In order to use the NEON unit in the kernel, we should
initialize it a bit earlier in the boot process so NEON users
that like to do a quick benchmark at load time (like the
xor_blocks or RAID-6 code) find the NEON/VFP unit already
enabled.

Replaced late_initcall() with core_initcall().

Change-Id: Ieb038c214c98e53fd4b986d04a087de1d6a62096
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Nicolas Pitre <nico@linaro.org>
ARM: be strict about FP exceptions in kernel mode

The support code in vfp_support_entry does not care whether the
exception that caused it to be invoked occurred in kernel mode or
in user mode. However, neither condition that could trigger this
exception (lazy restore and VFP bounce to support code) is
currently allowable in kernel mode.

In either case, print a message describing the condition before
letting the undefined instruction handler run its course and trigger
an oops.

Change-Id: I3bda0554bff9b88b4965c110c63092936bd8c2cf
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Nicolas Pitre <nico@linaro.org>
ARM: add support for kernel mode NEON

In order to safely support the use of NEON instructions in
kernel mode, some precautions need to be taken:
- the userland context that may be present in the registers (even
  if the NEON/VFP is currently disabled) must be stored under the
  correct task (which may not be 'current' in the UP case),
- to avoid having to keep track of additional vfpstates for the
  kernel side, disallow the use of NEON in interrupt context
  and run with preemption disabled,
- after use, re-enable preemption and re-enable the lazy restore
  machinery by disabling the NEON/VFP unit.

This patch adds the functions kernel_neon_begin() and
kernel_neon_end() which take care of the above. It also adds
the Kconfig symbol KERNEL_MODE_NEON to enable it.

Change-Id: I8fe19f8b413f969b50cc965bf90405fb96b681ed
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Nicolas Pitre <nico@linaro.org>
ARM: 7873/1: vfp: clear vfp_current_hw_state for dying cpu

The CPU_DYING notifier is called by cpu stopper task which
does not own the context held in the VFP hardware. Calling
vfp_force_reload() has no effect.
Replace it with clearing vfp_current_hw_state.

Change-Id: Ib93963fffdea784d2903c04d6d617a5cd884a8ce
Signed-off-by: Yuanyuan Zhong <zyy@motorola.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
crypto: create generic version of ablk_helper

Create a generic version of ablk_helper so it can be reused
by other architectures.

Change-Id: I48f570fd56ea9e281dd2a1504d2b9e13e78b1d95
Acked-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
ARM: crypto: add NEON accelerated XOR implementation

Add a source file xor-neon.c (which is really just the reference
C implementation passed through the GCC vectorizer) and hook it
up to the XOR framework.

Change-Id: Ic92f9b016bb47061088fe90bc32d62212b7bb4bb
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Nicolas Pitre <nico@linaro.org>