Added /Vdc and cos( ).

Using a strictly 0.5 duty cycle there was a low frequency ripple
at the output voltage. Adding in a vref/vdc compensated
for ripple on the AFE output and eliminated the output
voltage ripple (low frequency, undesired).

Also added in cos( ) function and implemented a
200+30*cos(100 Hz) output voltage signal.
Strange behavior from the BK precision load
somewhat stair-cased currents at a much lower frequency
so this may be a problem to use the BK as a case
study since I don't know what's going on inside.

So far so good on the AC perturbation+DC bias
from the interleaved converter.