add MSC (Mass Storage Class) support
Allow more than one usbd_register_set_config_callback

In a composite device if one want to separate code
for each interface, usbd_register_set_config_callback
can now register more than one callback.

Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
USB: Fix definition of function according to previous commit.
[l1-flash/eeprom] Add lock/unlock/eeprom helper routines
stm32: timers: Fix edge polarity setup

The CCxP/CCxNP bits are actually separated by a reserved bit, so the
correct mask is 0xa, (0b1010) not 0x6 (0b0110)

Reported by PyroDevil on the mailinglist
stm32: timers: fix mixup between TIMx_CCMR1 and TIMx_CCMR2 in timer_set_oc_mode()
stm32f3: drop redundant gpio.c

All methods in this file are in either
* common/gpio_common_all.c
* common/gpio_common_f0234.c

Those other files have better doxygen commentary, this file should never
have been added.
tiva lm4f: ssi: Initial implementation for SSI peripheral
docs: fix link from stm32f3 to stm32f0

Incorrectly pointed to f1.
Makefile: fix build for directories with spaces

When full path of a source directory has spaces in it, that makes
shell and Make split the path, so special treatment is
necessary. Additionally, @F doesn't honour the escaping, so has to be
avoided.

Reported-by: Roman Faizullin <roman@faizullin.info>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
vf6xx: initial add of Vybrid VF6xx support

Freescale Vybrid is a familiy of ARM SoC, wheras the VF6xx models
have two cores in one SoC, a Cortex-A5 and a Cortex-M4. This adds
initial support for the Cortex-M4 in the libopencm3 library.

By using two different ram areas (pc_ram and ps_ram) the user can
put the code in a RAM area bounded to the code bus. The data can
be stored in the data area. However, currently the initial values
of for the variables in the data section are stored in the code
section and copied to the ram section by the initialization code
(like it's copied from ROM to RAM on microcontrollers).
vf6xx: set vector table to memory

Set Vector Table Offset to memory location of our vector table.
Since we put the whole programm including the vector table into
memory, we need to make use of the Cortex-M4 system control block
Vector Table Offset Register (VTOR).
vf6xx: initial memorymap and clock control module

Add initial memorymap for Vybrid VF6xx module. Also add the clock
control module which allows to control system clocks and enable
clocks of individual pheripherials.
vf6xx: doc: initial commit

Add documentation Makefile and DoxygenLayout for Freescale Vybrid
VF6xx support.
vf6xx: enable floating-point coprocessor
vf6xx: calculate core clocks

Extend the clock controller module with a function to calculate
core clocks from the current registers settings. On Vybrid, we
assume that the core clocks are setup by the main operating system
running on the Cortex-A5. Nevertheless we need to know their actual
values in order to calculate other clocks or baud rates.

Verified on a Colibri VF61, which calculates following values:
ccm_core_clk: 500210526
ccm_platform_bus_clk: 166736842
ccm_ipg_bus_clk: 83368421
vf6xx: add UART support

This adds UART support for Vybrid VF6xx. Baud rate is calculated
from IPG clock, which need to be initialized by using the
ccm_calculate_clocks functions. Also clock need to be gated using
the ccm_clock_gate_enable function. Tested with an unitialized
UART with a baud rate of 115200.
vf61xx: initial GPIO support

This adds GPIO module support. GPIO can be controlled using the GPIO
number as stated in the reference manual, similar to Linux. Also
32-bit access to whole ports is possible. Reading a GPIO is possible
without muxing the pad as GPIO, however writing a GPIO needs the pad
to be muxed as GPIO.
vf6xx: add I/O mux controller

Add I/O mux controller which is required to mux pins according to
their used function. For all pads, the alternative function 0 is
GPIO. For different pin mux function refer to the reference manual.