radeonsi: add new SI pci ids

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: mesa-stable@lists.freedesktop.org
Increment version to 10.4.0-devel

Now that the 10.3 branch has been created
glx: Fix build since 679c2ef "glx/drisw: add support for DRI2rendererQueryExtension", when only building drisw renderer

v2:
- Move dri*_query_renderer_* into their respective dri*_priv.h headers
- Drop then unnneeded include of dri2.h from dri2_query_renderer.c
- Rename dri2_query_renderer.c as dri_common_query_renderer.c, as it's contents
now are used for more than dri[23]

Signed-off-by: Jon TURNEY <jon.turney@dronecode.org.uk>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Makefile: Switch from md5sums to sha256sums

We switched to these several stable releases ago, (since the MD5 algorithm has
been broken for some time), but only now did I get around to fixing this in
the Makefile rather than just performing this step manually.

CC: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
docs: Add my notes on stable-branch patch criteria

This captures the set of rules I have been using for stable-branch management,
(starting with a discussion on the mesa-dev mailing list on July 2013, and
then refined through my own experience of performing stable-branch releases
since then).
llvmpipe: change LP_MAX_SHADER_INSTRUCTIONS definition

This change will double cache size for branches which have a lower
LP_MAX_SHADER_VARIANTS limit (it will not do anything on master).
The reason is that nowadays shaders tend to be quite a bit larger than they
were (they were big when llvmpipe didn't have a fs loop, got much smaller with
that loop, and since then have gradually increased quite a bit though still
smaller than without the fs loop for various reasons - among them being d3d10
compliance, usage of 8-wide vectors, non-swizzled blend code). Thus effectively
less shaders would be cached (unless they were very small and the variant limit
was hit first). Also, since we're getting rid of the IR nowadays, the cached
shaders shouldn't need all that much memory actually.
docs: Update instructions for creating a release

This captures all of the steps I have been following in making releases for
the past year or so. This way, the instructions should be sound for anyone who
would like to take over the release process going forward.
glsl/linker: pass through the is_intrinsic flag

This flag was set to true for the atomic counter intrinsics, but it
never got plumbed through the linker, so by the time it got to the
backends it would always be set to the false. The current i965 backend
code doesn't use is_intrinsic, so this should not change any existing
code, but it's useful for codepaths that want to distinguish between
intrinsics and non-intrinsics without using strcmp.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Connor Abbott <connor.abbott@intel.com>
SCons: Rename dri2_query_renderer.c to dri_common_query_renderer.c.

Fix SCons build error introduced with commit
3fe7daec14282dc8e2f5c8cc547927e305009677.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
dri/radeon: drop obsolete radeon_{dri,macros}.h headers

Both have been unused for at least a couple of years.
For example the last user of radeon_macros.h was removed with

commit 8c11f0a88300f7bc3f05a12789c781ba0f4b3cc6
Author: Eric Anholt <eric@anholt.net>
Date:   Fri Oct 14 13:27:02 2011 -0700

    radeon: Drop the legacy BO manager code.

Cc: Marek Olšák <marek.olsak@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
include: move sarea.h next to it's only user

The header is used by DRI1 drivers, which we've removed a while
back. Now only the dri1 loader in libGL is using it, so let's
move it in src/glx, and prefix it accordingly.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
dri/radeon: cleanup the radeon_context vtbl

Remove the set-but-unused, and set-but-empty vtable entries.
Most likely a leftover from the dri1 days.

Cc: Marek Olšák <marek.olsak@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
dri/radeon: nuke the remaining references to sarea

Remainder of the dri1 times.

Cc: Marek Olšák <marek.olsak@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
st/clover: Change platform name from Default to Clover

Signed-off-by: Aaron Watry <awatry at gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
i965: Fix JIP/UIP calculations.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82846
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82929
vc4: Include stdio/stdlib in headers so I don't have to include it per file.

There are a few tools I want to have always available, and fprintf() and
abort() are among them.
vc4: Stop complaining about unknown texture channel types.

It doesn't matter to this code -- the sampler always returns 8-bit unorm
rgba.
vc4: Convert to using an enum for texture data types
vc4: Fix a typo in the validation for miplevels.

It meant that LUMALPHA was being marked as *many* miplevels, and
unsurprisingly wouldn't validate.  On the other hand, some miplevel counts
wouldn't get the small mips validated at all.
vc4: Add support for texture tiling.

This still treats everything as RGBA8888 for the most part, same as
before.  This is a prerequisite for handling other texture formats, since
only RGBA8888 has a raster-layout mode.