Debugging...

Added debug macro definition to cpu.c. I've also realized all opcodes are correct and the problem is with a ldh A [a8] opcode loading a value into register A. It loads 0x03 into A then it does logical and with A and 0x02 which is non-zero and then takes the jr nz. The other emulator doesn't take the jr nz, which means that the second bit of A is not set. the value loaded into A is [ff41] which means that mednafen is not in mode 2 or mode 3 (OAM or VRAM) at that time. Basically the problem is probably something in lcd.c where the step_lcd function changes modes. compareLYtoLYC doesn't seem to be causing this (which is reasonable) though this is another place where my emulator and mednafen differ.