usb:gadget:ums: Replace malloc calls with memalign to fix cache buffer alignment

Calls to malloc() have been replaced by memalign. It now provides proper
buffer alignment.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
usb:udc:samsung: Remove redundant cache operation from Samsung UDC driver

A set of cache operations (both invalidation and flush) were redundant
in the S3C HS OTG Samsung driver:

1. s3c_udc_ep0_zlp - to transmit EP0's ZLP packets one don't need to flush
the cache (since it is the zero length transmission)

2. s3c_udc_pre_setup and s3c_ep0_complete_out - cache invalidation is not
needed when the buffer for OUT EP0 transmission is setup, since no data
has yet arrived.

Cache cleanups presented above don't contribute much to transmission speed
up, hence shall be regarded as cosmetic changes.

3. setdma_rx - here the s3c UDC driver's internal buffers were invalidated.
This call is not needed anymore since we reuse the buffers passed from
gadgets. This is a key contribution to transmission speed improvement.

Test condition
- test HW + measurement: Trats - Exynos4210 rev.1
- test HW Trats2 - Exynos4412 rev.1
400 MiB compressed rootfs image download with `thor 0 mmc 0`

Measurements:

Base values (without improvement):
Transmission speed: 9.51 MiB/s

After the change:
Transmission speed: 10.15 MiB/s

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
usb:udc:samsung: Allow burst transfers for non EP0 endpints

This patch removed obscure restriction on the HW setting of DMA transfers.
Before this change each transaction sent up to 512 bytes (with packet count
equal to 1) for non EP0 transfer.

Now it is possible to setup DMA transaction up to DMA_BUFFER_SIZE.

Test condition
- test HW + measurement: Trats - Exynos4210 rev.1
- test HW Trats2 - Exynos4412 rev.1
400 MiB compressed rootfs image download with `thor 0 mmc 0`

Measurement:
Transmission speed: 20.74 MiB/s

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
usb:udc:samsung: Zero copy approach for data passed to Samsung's UDC driver

The Samsung's UDC driver is not anymore copying data from USB requests to
aligned internal buffers. Now it works directly in data allocated in the
upper layers like UMS, DFU, THOR.

This change is possible since those gadgets now must take care to allocate
buffers aligned to cache line (CONFIG_SYS_CACHELINE_SIZE).

This can be achieved by using DEFINE_CACHE_ALIGN_BUFFER() or
ALLOC_CACHE_ALIGN_BUFFER() macros. Those take care to allocate buffer
aligned to cache line in both starting address and its size.
Sometimes it is enough to just use memalign() with size being a
multiplication of cache line size.

Test condition
- test HW + measurement: Trats - Exynos4210 rev.1
- test HW Trats2 - Exynos4412 rev.1
400 MiB compressed rootfs image download with `thor 0 mmc 0`

Measurement:
Transmission speed: 27.04 MiB/s

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
usb:gadget:f_thor: Allocate request up to THOR_PACKET_SIZE not ep->maxpacket

Now it is possible to allocate static request - which receives data from
the host (OUT transaction) to the size of THOR packet.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
usb:gadget:f_thor: cosmetic: Remove debug memset

Apparently debug memset (with a 0x55 value) has been overlooked in the
f_thor code.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
usb: mv_udc: Rename to ci_udc

The mv_udc is not marvell-specific anymore. The mv_udc is used to drive
generic ChipIdea CI13xxx series OTG cores, so rename the driver to ci_udc
instead.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Stefano Babic <sbabic@denx.de>
fpga: zynq: Correct fpga load when buf is not aligned

When ARCH_DMA_MINALIGN is greater than header size of the bit file, and buf is
not aligned, new_buf address became greater then buf_start address and the
load_word loop corrupts bit file data.

A work around is to decrease new_buf of ARCH_DMA_MINALIGN, it might corrupt data
before buf but permits to load correctly.

Signed-off-by: Stany MARCEL <smarcel@novasys-ingenierie.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
fpga: zynqpl: Add support for zc7015 device

Just extend tables with this new device.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Merge branch 'fpga' of git://www.denx.de/git/u-boot-microblaze
include/usb/s3c_udc.h: Add <asm/sizes.h>

With e0059ea switching to using SZ_1K, we need to #include <asm/sizes.h>
here for everyone to build still.

Signed-off-by: Tom Rini <trini@ti.com>