Import Apache apr-1.4.8 to vendor staging area.
Add segment protection and limits violation checks in vie_calculate_gla()
for 32-bit x86 guests.

Tested using ins/outs executed in a FreeBSD/i386 guest.
Emphasis on 'do not' and 'complement' in the strcspn(3)
Replace literal parentheses with .Po/.Pc

Approved by:	wblock (mentor)
Update serf 1.3.4 -> 1.3.5
Merge svn-1.8.8 -> 1.8.9
Xr bktr.4
Vendor import apr-1.5.1
Merge apr-1.4.8 -> apr-1.5.1 and update.
Update backend files and makefiles for apr 1.4.8 -> 1.5.1
The users of RSS shouldn't be directly concerned about hash -> CPU ID
mappings.  Instead, they should be first mapping to an RSS bucket and
then querying the RSS bucket -> CPU ID mapping to figure out the target
CPU.

When (if?) RSS rebalancing is implemented or some other (non round-robin)
distribution of work from buckets to CPU IDs, various bits of code - both
userland and kernel - will need to know how this mapping works.

So, to support this:

* Add a new function rss_m2bucket() - this maps an mbuf to a given bucket.
  Anything which is currently doing hash -> CPU work may instead wish to
  do hash -> bucket, and then query the bucket->cpuid map for which
  CPU it belongs on.  Or, map it to a bucket, then re-pin that bucket ->
  CPU during a rebalance operation.

* For userland applications which wish to exploit affinity to RSS buckets,
  the bucket -> CPU ID mapping is now available via a sysctl.
  net.inet.rss.bucket_mapping lists the bucket to CPU ID mapping via
  a list of bucket:cpu pairs.
- Improve performance by fixing incorrect Rx/Tx handling
- Rename definition of AXGE_* to reflect reality
- Add new USB IDs
Multiple fixes and improvements:
- Put "_LE_" into the register access macros to indicate little endian
byte order is expected by the hardware.
- Avoid using the bounce buffer when not strictly needed. Try to move
data directly using bus-space functions first.
- Ensure we preserve the reserved bits in the power down mode
register. Else the hardware goes into a non-recoverable state.
- Always use 32-bit access when writing or reading registers or FIFOs,
because the hardware is 32-bit oriented and don't really understand 8-
and 16-bit access.
- Correct writes to the memory address register. There is no need to
shift the register offset.
- Correct interval for interrupt endpoints.
- Optimise 90ns internal memory buffer read delay.
- Rename PDT into PTD, which is how the datasheet writes it.
- Add missing programming for activating host controller PTDs.

Sponsored by:	DARPA, AFRL
- Correct bus space resource type for register access.
- Add configuration of interrupt type and polarity via FDT.

Sponsored by:	DARPA, AFRL
Disconnect the following geom classes from the kernel modules build:
BSD, FOX, MBR, PC98, SUNLABEL and VOL_FFS. They all have a modern
replacement. Also it is still possible build them manually.

Discussed with:	geom
Add PCI ID for AMT based serial interface found on the Lenovo T61.

uart2: <Intel AMT - PM965/GM965 KT Controller> port 0x1830-0x1837
	mem 0xfe024000-0xfe024fff irq 17 at device 3.3 on pci0
uart2: console (115200,n,8,1)

Tested as tty and serial console.  Seems "fine"
Revert r266481.  It was based on faulty analysis of the problem.  A correct
fix is forthcoming.

Obtained from:	Netflix, Inc.
Now that there are separate back-end implementations of busdma, the bounce
implementation shouldn't steal flags from the common front-end.
Move those flags to the back-end.

Obtained from:  Netflix, Inc.
MFC after:      3 days
Remove empty lines that cause mdoc warnings.

Sponsored by:	The FreeBSD Foundation
Regen after r266752.

Sponsored by:	The FreeBSD Foundation
Better documentation for why KERBEROS and OPENSSH are here, and where
to look for all the other options that used to be here (well, in
bsd.own.mk)

Suggested by: des@