PR libstdc++/59392: Fix ARM EABI uncaught throw from unexpected exception handler

libstdc++-v3/
	PR libstdc++/59392
	* libsupc++/eh_call.cc (__cxa_call_unexpected): Call __do_catch with
	the address of a null pointer, not with a null pointer to pointer.
	Copy comment for this case from eh_personality.cc:__cxa_call_unexpected.
	* testsuite/18_support/bad_exception/59392.cc: New file.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208519 138bc75d-0d04-0410-961f-82ee72b054a4
        * config/arc/arc.c (arc_predicate_delay_insns): 
        Fix third argument passed to conditionalize_nonjump.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208521 138bc75d-0d04-0410-961f-82ee72b054a4
[gcc]
2014-03-12  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/vector.md (VEC_L): Add V1TI mode to vector types.
	(VEC_M): Likewise.
	(VEC_N): Likewise.
	(VEC_R): Likewise.
	(VEC_base): Likewise.
	(mov<MODE>, VEC_M modes): If we are loading TImode into VSX
	registers, we need to swap double words in little endian mode.

	* config/rs6000/rs6000-modes.def (V1TImode): Add new vector mode
	to be a container mode for 128-bit integer operations added in ISA
	2.07.  Unlike TImode and PTImode, the preferred register set is
	the Altivec/VMX registers for the 128-bit operations.

	* config/rs6000/rs6000-protos.h (rs6000_move_128bit_ok_p): Add
	declarations.
	(rs6000_split_128bit_ok_p): Likewise.

	* config/rs6000/rs6000-builtin.def (BU_P8V_AV_3): Add new support
	macros for creating ISA 2.07 normal and overloaded builtin
	functions with 3 arguments.
	(BU_P8V_OVERLOAD_3): Likewise.
	(VPERM_1T): Add support for V1TImode in 128-bit vector operations
	for use as overloaded functions.
	(VPERM_1TI_UNS): Likewise.
	(VSEL_1TI): Likewise.
	(VSEL_1TI_UNS): Likewise.
	(ST_INTERNAL_1ti): Likewise.
	(LD_INTERNAL_1ti): Likewise.
	(XXSEL_1TI): Likewise.
	(XXSEL_1TI_UNS): Likewise.
	(VPERM_1TI): Likewise.
	(VPERM_1TI_UNS): Likewise.
	(XXPERMDI_1TI): Likewise.
	(SET_1TI): Likewise.
	(LXVD2X_V1TI): Likewise.
	(STXVD2X_V1TI): Likewise.
	(VEC_INIT_V1TI): Likewise.
	(VEC_SET_V1TI): Likewise.
	(VEC_EXT_V1TI): Likewise.
	(EQV_V1TI): Likewise.
	(NAND_V1TI): Likewise.
	(ORC_V1TI): Likewise.
	(VADDCUQ): Add support for 128-bit integer arithmetic instructions
	added in ISA 2.07.  Add both normal 'altivec' builtins, and the
	overloaded builtin.
	(VADDUQM): Likewise.
	(VSUBCUQ): Likewise.
	(VADDEUQM): Likewise.
	(VADDECUQ): Likewise.
	(VSUBEUQM): Likewise.
	(VSUBECUQ): Likewise.

	* config/rs6000/rs6000-c.c (__int128_type): New static to hold
	__int128_t and __uint128_t types.
	(__uint128_type): Likewise.
	(altivec_categorize_keyword): Add support for vector __int128_t,
	vector __uint128_t, vector __int128, and vector unsigned __int128
	as a container type for TImode operations that need to be done in
	VSX/Altivec registers.
	(rs6000_macro_to_expand): Likewise.
	(altivec_overloaded_builtins): Add ISA 2.07 overloaded functions
	to support 128-bit integer instructions vaddcuq, vadduqm,
	vaddecuq, vaddeuqm, vsubcuq, vsubuqm, vsubecuq, vsubeuqm.
	(altivec_resolve_overloaded_builtin): Add support for V1TImode.

	* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): Add support
	for V1TImode, and set up preferences to use VSX/Altivec
	registers.  Setup VSX reload handlers.
	(rs6000_debug_reg_global): Likewise.
	(rs6000_init_hard_regno_mode_ok): Likewise.
	(rs6000_preferred_simd_mode): Likewise.
	(vspltis_constant): Do not allow V1TImode as easy altivec
	constants.
	(easy_altivec_constant): Likewise.
	(output_vec_const_move): Likewise.
	(rs6000_expand_vector_set): Convert V1TImode set and extract to
	simple move.
	(rs6000_expand_vector_extract): Likewise.
	(reg_offset_addressing_ok_p): Setup V1TImode to use VSX reg+reg
	addressing.
	(rs6000_const_vec): Add support for V1TImode.
	(rs6000_emit_le_vsx_load): Swap double words when loading or
	storing TImode/V1TImode.
	(rs6000_emit_le_vsx_store): Likewise.
	(rs6000_emit_le_vsx_move): Likewise.
	(rs6000_emit_move): Add support for V1TImode.
	(altivec_expand_ld_builtin): Likewise.
	(altivec_expand_st_builtin): Likewise.
	(altivec_expand_vec_init_builtin): Likewise.
	(altivec_expand_builtin): Likewise.
	(rs6000_init_builtins): Add support for V1TImode type.  Add
	support for ISA 2.07 128-bit integer builtins.  Define type names
	for the VSX/Altivec vector types.
	(altivec_init_builtins): Add support for overloaded vector
	functions with V1TImode type.
	(rs6000_preferred_reload_class): Prefer Altivec registers for
	V1TImode.
	(rs6000_move_128bit_ok_p): Move 128-bit move/split validation to
	external function.
	(rs6000_split_128bit_ok_p): Likewise.
	(rs6000_handle_altivec_attribute): Create V1TImode from vector
	__int128_t and vector __uint128_t.

	* config/rs6000/vsx.md (VSX_L): Add V1TImode to vector iterators
	and mode attributes.
	(VSX_M): Likewise.
	(VSX_M2): Likewise.
	(VSm): Likewise.
	(VSs): Likewise.
	(VSr): Likewise.
	(VSv): Likewise.
	(VS_scalar): Likewise.
	(VS_double): Likewise.
	(vsx_set_v1ti): New builtin function to create V1TImode from
	TImode.

	* config/rs6000/rs6000.h (TARGET_VADDUQM): New macro to say
	whether we support the ISA 2.07 128-bit integer arithmetic
	instructions.
	(ALTIVEC_OR_VSX_VECTOR_MODE): Add V1TImode.
	(enum rs6000_builtin_type_index): Add fields to hold V1TImode
	and TImode types for use with the builtin functions.
	(V1TI_type_node): Likewise.
	(unsigned_V1TI_type_node): Likewise.
	(intTI_type_internal_node): Likewise.
	(uintTI_type_internal_node): Likewise.

	* config/rs6000/altivec.md (UNSPEC_VADDCUQ): New unspecs for ISA
	2.07 128-bit builtin functions.
	(UNSPEC_VADDEUQM): Likewise.
	(UNSPEC_VADDECUQ): Likewise.
	(UNSPEC_VSUBCUQ): Likewise.
	(UNSPEC_VSUBEUQM): Likewise.
	(UNSPEC_VSUBECUQ): Likewise.
	(VM): Add V1TImode to vector mode iterators.
	(VM2): Likewise.
	(VI_unit): Likewise.
	(altivec_vadduqm): Add ISA 2.07 128-bit binary builtins.
	(altivec_vaddcuq): Likewise.
	(altivec_vsubuqm): Likewise.
	(altivec_vsubcuq): Likewise.
	(altivec_vaddeuqm): Likewise.
	(altivec_vaddecuq): Likewise.
	(altivec_vsubeuqm): Likewise.
	(altivec_vsubecuq): Likewise.

	* config/rs6000/rs6000.md (FMOVE128_GPR): Add V1TImode to vector
	mode iterators.
	(BOOL_128): Likewise.
	(BOOL_REGS_OUTPUT): Likewise.
	(BOOL_REGS_OP1): Likewise.
	(BOOL_REGS_OP2): Likewise.
	(BOOL_REGS_UNARY): Likewise.
	(BOOL_REGS_AND_CR0): Likewise.

	* config/rs6000/altivec.h (vec_vaddcuq): Add support for ISA 2.07
	128-bit integer builtin support.
	(vec_vadduqm): Likewise.
	(vec_vaddecuq): Likewise.
	(vec_vaddeuqm): Likewise.
	(vec_vsubecuq): Likewise.
	(vec_vsubeuqm): Likewise.
	(vec_vsubcuq): Likewise.
	(vec_vsubuqm): Likewise.

	* doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
	Document vec_vaddcuq, vec_vadduqm, vec_vaddecuq, vec_vaddeuqm,
	vec_subecuq, vec_subeuqm, vec_vsubcuq, vec_vsubeqm builtins adding
	128-bit integer add/subtract to ISA 2.07.

[gcc/testsuite]
2014-03-12  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* gcc.target/powerpc/p8vector-int128-1.c: New test to test ISA
	2.07 128-bit arithmetic.
	* gcc.target/powerpc/p8vector-int128-2.c: Likewise.

	* gcc.target/powerpc/timode_off.c: Restrict cpu type to power5,
	due to when TImode is allowed in VSX registers, the allowable
	address modes for TImode is just a single indirect address in
	order for the value to be loaded and store in either GPR or VSX
	registers.  This affects the generated code, and it would cause
	this test to fail, when such an option is used.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208522 138bc75d-0d04-0410-961f-82ee72b054a4
Daily bump.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208525 138bc75d-0d04-0410-961f-82ee72b054a4
	* tree-cfgcleanup.c (remove_forwarder_block_with_phi): Record
	BB's single pred and update the father loop's latch info later.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208527 138bc75d-0d04-0410-961f-82ee72b054a4
2014-03-12  Jerry DeLisle  <jvdelisle@gcc.gnu>

	PR libfortran/38199
	* io/read.c (read_decimal): Quickly skip spaces to avoid calls
	to next_char.
	* io/unit.c (is_trim_ok): New helper function to check various
	conditions to see if its OK to trim the internal unit string.
	(get_internal_unit): Use LEN_TRIM to shorten selected internal
	unit strings for optimizing READ. Enable this optimization for
	formatted READ.
	* io/list_read.c (finish_list_read): Don't call eat_line for
	internal units.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208528 138bc75d-0d04-0410-961f-82ee72b054a4
	* ChangeLog: Fix whitespace.
	* testsuite/ChangeLog: Ditto.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208530 138bc75d-0d04-0410-961f-82ee72b054a4
	PR target/60486
	* config/avr/avr.c (avr_out_plus): Swap cc_plus and cc_minus in
	calls of avr_out_plus_1.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208532 138bc75d-0d04-0410-961f-82ee72b054a4
	PR tree-optimization/59025
	PR middle-end/60418
	* tree-ssa-reassoc.c (sort_by_operand_rank): For SSA_NAMEs with the
	same rank, sort by bb_rank and gimple_uid of SSA_NAME_DEF_STMT first.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208535 138bc75d-0d04-0410-961f-82ee72b054a4
2014-03-13  Richard Biener  <rguenther@suse.de>

	* lib/lto.exp (lto-execute): Fix error catching for dg-final.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208536 138bc75d-0d04-0410-961f-82ee72b054a4
2014-03-13  Cesar Philippidis  <cesar@codesourcery.com>

	* lto-wrapper.c (maybe_unlink_file): Suppress diagnostic
	messages.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208537 138bc75d-0d04-0410-961f-82ee72b054a4
/cp
2014-03-13  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/60254
	* semantics.c (finish_static_assert): Call cxx_constant_value only
	if require_potential_rvalue_constant_expression returns true.

/testsuite
2014-03-13  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/60254
	* g++.dg/cpp0x/static_assert10.C: New.
	* g++.dg/cpp0x/static_assert11.C: Likewise.
	* g++.dg/cpp0x/static_assert3.C: Adjust.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208538 138bc75d-0d04-0410-961f-82ee72b054a4
	PR ada/51483
	* cstand.adb (Register_Float_Type): Add 'precision' parameter and use
	it to set the RM size.  Use directly 'size' for the Esize.
	(Create_Back_End_Float_Types): Adjust call to above.
	* get_targ.ads (Register_Type_Proc): Add 'precision' parameter.
	* set_targ.ads (FPT_Mode_Entry): Add 'precision' component.
	(Write_Target_Dependent_Values): Adjust comment.
	* set_targ.adb (Register_Float_Type): Add 'precision' parameter and
	deal with it.
	(Write_Target_Dependent_Values): Write the precision in lieu of size.
	(Initialization): Read the precision in lieu of size and compute the
	size from the precision and the alignment.
	* gcc-interface/gigi.h (enumerate_modes): Add integer parameter.
	* gcc-interface/misc.c (enumerate_modes): Likewise.  Do not register
	types for vector modes, pass the size in addition to the precision.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208546 138bc75d-0d04-0410-961f-82ee72b054a4
2014-03-13  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/57189
	* lra-constraints.c (process_alt_operands): Disfavor spilling
	vector pseudos.

2014-03-13  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/57189
	* gcc.target/i386/pr57189.c: New.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208549 138bc75d-0d04-0410-961f-82ee72b054a4
/cp
2014-03-13  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/60383
	* pt.c (maybe_process_partial_specialization): Check return value
	of check_specialization_namespace.

/testsuite
2014-03-13  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/60383
	* g++.dg/template/crash118.C: New.
	* g++.dg/template/crash95.C: Adjust.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208550 138bc75d-0d04-0410-961f-82ee72b054a4
	PR rtl-optimization/57320
	* function.c (rest_of_handle_thread_prologue_and_epilogue): Cleanup
	the CFG after thread_prologue_and_epilogue_insns.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208551 138bc75d-0d04-0410-961f-82ee72b054a4
	* regex.c (bzero) [!_LIBC]: Define without coma expression.
	(regerror): Cast the call to memcpy to (void) to avoid unused
	value warnings.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208553 138bc75d-0d04-0410-961f-82ee72b054a4
	PR tree-optimization/59779
	* tree-dfa.c (get_ref_base_and_extent): Use double_int
	type for bitsize and maxsize instead of HOST_WIDE_INT.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208554 138bc75d-0d04-0410-961f-82ee72b054a4
PR debug/60438

        * config/i386/i386.c (ix86_split_fp_branch): Remove pushed argument.
        (ix86_force_to_memory, ix86_free_from_memory): Remove.
        * config/i386/i386-protos.h: Likewise.
        * config/i386/i386.md (floathi<X87MODEF>2): Use assign_386_stack_local
        in the expander instead of a splitter.
        (float<SWI48x><X87MODEF>2): Use assign_386_stack_local if there is
        any possibility of requiring a memory.
        (*floatsi<MODEF>2_vector_mixed): Remove, and the splitters.
        (*floatsi<MODEF>2_vector_sse): Remove, and the splitters.
        (fp branch splitters): Update for ix86_split_fp_branch.
        (*jcc<X87MODEF>_<SWI24>_i387): Remove r/f alternative.
        (*jcc<X87MODEF>_<SWI24>_r_i387): Likewise.
        (splitter for jcc<X87MODEF>_<SWI24>_i387 r/f): Remove.
        (*fop_<MODEF>_2_i387): Remove f/r alternative.
        (*fop_<MODEF>_3_i387): Likewise.
        (*fop_xf_2_i387, *fop_xf_3_i387): Likewise.
        (splitters for the fop_* register patterns): Remove.
        (fscalexf4_i387): Rename from *fscalexf4_i387.
        (ldexpxf3): Use gen_floatsixf2 and gen_fscalexf4_i387.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208556 138bc75d-0d04-0410-961f-82ee72b054a4
	PR middle-end/36282
	* c-pragma.c (apply_pragma_weak): Only look at
	TREE_SYMBOL_REFERENCED (DECL_ASSEMBLER_NAME (decl)) if
	DECL_ASSEMBLER_NAME_SET_P (decl).
	(maybe_apply_pending_pragma_weaks): Exit early if
	vec_safe_is_empty (pending_weaks) rather than only when
	!pending_weaks.
	(maybe_apply_pragma_weak): Likewise.  If !DECL_ASSEMBLER_NAME_SET_P,
	set assembler name back to NULL afterwards.

	* c-c++-common/pr36282-1.c: New test.
	* c-c++-common/pr36282-2.c: New test.
	* c-c++-common/pr36282-3.c: New test.
	* c-c++-common/pr36282-4.c: New test.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208557 138bc75d-0d04-0410-961f-82ee72b054a4