ARM: tegra: add DT files for Tegra124 and Venice2

These are fairly complete, and near-clones of Tegra114 Venice, with an
additional I2C port, and MMC address changes for Tegra124.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
v2:
* Added aliases for SPI devices so they always have the same ID.
* Gave each node a unit address where required.
* Fixed all compatible values to match the Linux kernel.
* s/status = "disable"/status = "disabled"/
* Removed properties and nodes that ara:
 - Non-standard and don't match DTs in U-Boot for earlier Tegra SoCs.
 - Not used or for features that don't yet work.
 - ChromeOS specific.
ARM: tegra: add Venice2 (Tegra124) board

These are the board files for Venice2 (Tegra124), plus the AS3722 PMIC
files. PMIC init will be moved to pmic_common_init later.

This builds/boots on Venice2, SPI/MMC/USB/I2C all work. Audio, display
and WB/LP0 are not supported yet.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
v2:
* Convert to Kconfig-style make Makefiles.
* Updated default environment to enable bootcmd_pxe.
* Removed most functional diffs (i.e. other than SoC name, valid values,
  etc.) between include/configs/tegra1[12]4-common.h.
* Deleted PMIC programming code that was disabled; it can be added later
  if it turns out to be useful.
* Fixed boards.cfg sort order.
* Removed unused define CONFIG_TEGRA_USE_EMC_DRAM_SIZE.
* Minor comment cleanup.
ARM: tegra: fix "bootp" issue for Tegra124 too

Fix the timeout issue after running "bootp" command in U-Boot console.

TXFIFOTHRES bits of TXFILLTUNING register should be set to 0x10 after a
controller reset and before RUN bit is se, (per technical reference
manual.

Signed-off-by: Jim Lin <jilin@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
LATER: ARM: tegra: add support for more clocks on Tegra114

FIXME: work on this later after Tegra124 support.
FIXME: re-write commit description now it's been split up...

Some Tegra114 peripherals can take up to 8 different clock sources
(parents), including 4 new ones that don't exist on previous chips
(PLLC2/C3/MEM2/SRC2). Expand clock/PLL code/tables to support these
additional bits/sources.

Changes were made to some common code. Testing on Tegra30 and Tegra20
showed no changes in periph clock sources/divisors.

Also, peripheral clock sources that no longer exist on Tegra114 were
removed from the clock_periph_type table (CVE, TVDAC, etc.), and periphs
that are gone or not needed in early init are no longer brought out of
reset/enabled (FUSE, IRAMA/B/C/D, etc.).

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
v3:
* Undid change to assert on divisor value; the fix was applied to the
  wrong assert. The assert which should have been fixed was within the
  removed unused code.
v2:
- Fixed an assert test for a divisor value (s/b >0, not >=0)
- Remove some unused code
Revert "LATER: ARM: tegra: add support for more clocks on Tegra114"

This reverts commit 6cf0329f447d51e1ad5909d46f79cfd4756a4c93.
LATER: ARM: tegra: dalmore: add PMIC init for various peripherals

FIXME: work on this later after Tegra124 support.

These power rails are currently needed for kernel boot. This will be move
to a PMIC-specific driver (or even better moved to the kernel) at a later
date.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Revert "LATER: ARM: tegra: dalmore: add PMIC init for various peripherals"

This reverts commit 2e5b746676e5360325456184750e979726b4a009.