[Seairth] Converted top-level modules to Verilog

This was based on work by Seairth, who based his sources on the Xilinx sources by Magnus Karlsson.
See http://forums.parallax.com/showthread.php/157196
Advantages of using only Verilog:
- It's only necessary to learn one Hardware Description Language to understand the project
- As I understand it, the Xilinx tools don't understand AHDL so it will be easier to merge the Altera and Xilinx tools together

Also added features.v to start adding features. The file is included after the top module header, so that it can be used to override parameters of lower-level modules (I tried, but couldn't find a way to override parameters in Quartus for any other module except for the top-level module. And the old parameter override for inverting the BeMicro LEDs didn't work anymore now the top-level modules are Verilog instead of AHDL, so it has to be implemented with a `define.
Merge branch 'Altera' of https://github.com/jacgoudsmit/P8X32A_Emulation into Altera