UPSTREAM: r8169: remember WOL preferences on driver load

Do not clear Broadcast/Multicast/Unicast Wake Flag or LanWake in
Config5. This is necessary to preserve WOL state when the driver is
loaded. Although the r8168 vendor driver does not write Config5 (it has
been commented out), Hayes Wang from Realtek said that masking bits like
this is more sensible.

BUG=chrome-os-partner:27513
TEST=Manual on Monroe. Boot system, run powerd_dbus_suspend, verify that
magic packet wakes device.

Signed-off-by: Peter Wu <lekensteyn@gmail.com>
Acked-by: Francois Romieu <romieu@fr.zoreil.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from commit 8f9d5138035de0940358cfb36eed16ebdaf5a4e5)

Change-Id: Idd4c3d8a47340c626f6df3fe2bf791a7b29e973a
Reviewed-on: https://chromium-review.googlesource.com/193218
Tested-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-by: mukesh agrawal <quiche@chromium.org>
Commit-Queue: Shawn Nematbakhsh <shawnn@chromium.org>
(cherry picked from commit 533b81f3fe9ed94118c37db783e2a4d11c5e4bd5)
Reviewed-on: https://chromium-review.googlesource.com/193421
HACK: exynos5420: devfreq: Set wcore frequency to 333 Mhz for all levels

On pit, video decode latency is high when wcore freq is lower.
Since voltage for all levels are the same it is safe to set
wcore frequency to 333 for all the 4 levels.

This can be reverted once a proper fix to lock devfreq lands.

BUG=chrome-os-partner:27529
TEST=Run vdau and measure decode time for 1080p vp8 stream

Change-Id: I99efe0a87f58d0700d938778bbb303e38c3a0820
Signed-off-by: Arun Mankuzhi <arun.m@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/193003
Reviewed-by: Arun Mankuzhi <arun@chromium.org>
Tested-by: Arun Mankuzhi <arun@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Commit-Queue: Arun Mankuzhi <arun@chromium.org>
(cherry picked from commit b10ba6a7b453fafdf2b8801309657bcdfa9b3d9d)
Reviewed-on: https://chromium-review.googlesource.com/193771
Reviewed-by: Katie Roberts-Hoffman <katierh@chromium.org>
Commit-Queue: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
ARM: dtsi: Remove G2D powerdomain node for Exynos542X

Lets remove the G2D Power Domain node for Exynos542x system.

For the following resons
1. As the G2D device is not used in chrome system for Exynos542X
2. commit: f84afb67d96a302a741b02a957062c37950d220d
   "arm: exynos: Keep G2D PD enabled during sleep on Exynos542X"
   Keeps the device alive across S2R for Crypto to work.
3. Power measured across s2r with this change and without this
   change is similar

BUG=chrome-os-partner:27880
TEST=built for pit/pi running suspend_stress_test works fine

Change-Id: Ic57dcb516db550366f0688d965abc113b42f8594
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/193600
Reviewed-by: Doug Anderson <dianders@chromium.org>
Commit-Queue: naveen krishna <naveen@chromium.org>
Tested-by: naveen krishna <naveen@chromium.org>
CHERRY-PICK: drm/exynos: Fix a startup race that could lead to div by zero.

Sometimes modeset takes a long time to return but the ordering
of drm_crtc_helper_set_mode would have already enabled vblanks
before hwmode has been set in that same function.  This caused
a divide by zero when vblanks were disabled.

BUG=chromium:348218
TEST=Tested on spring with HDMI

Change-Id: Id0d5e21f3eec8087a4a215e03aac3800fe959dd9
Signed-off-by: David Riley <davidriley@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/188689
Reviewed-by: Sean Paul <seanpaul@chromium.org>
(cherry picked from commit 3834f1ad94d62214465248bf4507fa5ff4ac8161)
Reviewed-on: https://chromium-review.googlesource.com/193934
CHERRY-PICK: drm/anx7808: Detect when bridge fails hotplug and try to recover

On some hotplugs the bridge would fully enable HDMI and then have
the downstream HPD flap.  Upon detecting the loss of downstream HPD
it would be propogated upstream and result in the hotplug failing to
display video on the external display.  This change tracks when HDMI is
fully enabled but avoids disabling upstream HPD and instead relies on
anx7808_detect in determining when the connection is lost.

BUG=chromium:348169
TEST=Tested on spring with HDMI by repeatedly hotplugging HDMI, toggling between adapter being powered and unpowered between hotplugs.

Change-Id: I893bf896522916735435113c346cd85ad115290e
Signed-off-by: David Riley <davidriley@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/192431
Reviewed-by: Sean Paul <seanpaul@chromium.org>
(cherry picked from commit ff5d60c8bf23e6526e3474d7440009cbfd7c8bbd)
Reviewed-on: https://chromium-review.googlesource.com/193940
CHERRY-PICK: drm/anx7808: Attempt to retrain link automatically

Switching inputs on an external would result in the downstream
link being lost and never being reestablished when the input was changed
back to HDMI.   This change detects when the downstream link is lost and
is again active but the upstream link is still present and tries to
retrain the link if possible.

BUG=chromium:348169
TEST=Tested on spring with HDMI by switching modes away from and back to HDMI on Asus PA-248Q moitor

Change-Id: I2a76ac64c5764d3c3a388c593a880681d829354e
Signed-off-by: David Riley <davidriley@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/192432
Reviewed-by: Sean Paul <seanpaul@chromium.org>
(cherry picked from commit 5d6c75c72aa9686d70b1c610293574ffb4910be9)
Reviewed-on: https://chromium-review.googlesource.com/193941
CHERRY-PICK: drm/anx7808: Handle unplug of adapter during modeset gracefully

Unplugging the HDMI adapter during a modeset could cause a failure
and power off while under lock preventing the POLLING_ERR interrupt
from being handled.  The POLLING_ERR interrupt is responsible for
resetting the cable detect oneshot and this would prevent future
hotplugs from being detected.

BUG=chromium:359850
TEST=On spring unplug HDMI adapter during modeset and then plug in after POLLING_ERR interrupt has been missed

Change-Id: Ic5fdd24c990ab8c066fcb60a1276bd0d3b7abe2a
Signed-off-by: David Riley <davidriley@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/193176
(cherry picked from commit 151c593afdcecb0bb896cb761e1d968345f8954c)
Reviewed-on: https://chromium-review.googlesource.com/193942
Reviewed-by: Sean Paul <seanpaul@chromium.org>
CHERRY-PICK: drm/anx7808: Avoid downstream retraining when enabling.

Key downstream retraining off of LANE0_1_STATUS_SUCCESS instead of
VIDEO_STABLE since anx7808_enable() already blocks waiting for
LANE0_1_STATUS_SUCCESS.  Without this change, retraining could be
attempted immediately after enabling.  Also update infoframes and
audio when retraining.

BUG=chromium:348169
TEST=Tested on spring with HDMI by switching modes away from and back to
HDMI on Asus PA-248Q monitor

Change-Id: I792931ac59b6278bbf7834460e6a2a0808dc22f0
Signed-off-by: David Riley <davidriley@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/193177
Reviewed-by: Sean Paul <seanpaul@chromium.org>
(cherry picked from commit c9f68e68b94b030bc80d68e90f794d41d95c4aaf)
Reviewed-on: https://chromium-review.googlesource.com/194031
ARM: dts: Increase EC/AP communication margins on peach

We have seen occasional checksum failures reported on the SPI bus
that's used for EC/AP communications.  We don't know 100% what's
causing the problems, so we'll take a scattershot approach and hope it
helps.

1. Decrease SPI speed from 4MHz to 3.125MHz.  There appears to be some
   problems on the EC when running SPI at 4.5MHz.  It's entirely
   possible that we _might_ have problems even if we're at 4MHz.
   Let's bump the speed down a bit to give us some margin.

2. Increase the drive strength of the SPI lines.  We've already got
   the chip select line at x4 drive strength.  Move the clock/data
   lines up to x2 from x1.  The slightly higher drive strength should
   just give a little extra integrity to the signal.

3. Adjust our sampling phase offset from 180 degrees to 90 degrees.
   My measurements show that the response from the EC is delayed by
   about 25ns.  At 3.125MHz each phase offset is 62.5ns.  At 4MHz each
   is 50ns.  At 10MHz each is 25ns.  ...so delaying by 90 degrees
   should only increase margin.  Extra confidence is gained by
   observing that 0, 90, and 180 all work OK but when you move to 270
   you start getting failures.

BUG=chrome-os-partner:27445
TEST=Stress ec: "while true; do ectool version > /dev/null; done"
TEST=See sclk_spi2 is 6250000 (3.125 x 2) in /sys/kernel/*/clk/*_summary
TEST=Look on scope and see that signals look good

Change-Id: I3f8dee5bcff31da37379e796192ae72c0b079b79
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/192619
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
(cherry picked from commit 21856bfd135260ec3c2e999cc8b697920ca2ec06)
Reviewed-on: https://chromium-review.googlesource.com/194124
UPSTREAM: Bluetooth: btmrvl: separate write-to-clear function from interrupt handler

This patch improves readability and makes future changes easier.

Signed-off-by: Bing Zhao <bzhao@marvell.com>

BUG=chrome-os-partner:26511
TEST=hciconfig up and hcitool scan work fine

Change-Id: I197273bb4356cc904911457a655b0669d4427135
Reviewed-on: https://chromium-review.googlesource.com/191933
Reviewed-by: hyuckjoo lee <hyuckjoolee345@gmail.com>
Tested-by: hyuckjoo lee <hyuckjoolee345@gmail.com>
Reviewed-by: Bing Zhao <bzhao@marvell.com>
Tested-by: Bing Zhao <bzhao@marvell.com>
Reviewed-by: Scott James Remnant <keybuk@chromium.org>
Commit-Queue: Bing Zhao <bzhao@marvell.com>
(cherry picked from commit 2503502fccb64d521e4ac3cb05bac5e7410f4600)
Reviewed-on: https://chromium-review.googlesource.com/194099
Commit-Queue: Katie Roberts-Hoffman <katierh@chromium.org>
UPSTREAM: Bluetooth: btmrvl: implement read-to-clear for SD8897 interrupts

For SD8897, CMD52 write_to_clear may have missing interrupts
under certain corner case condition. Use CMD53 read-to-clear
to fix the problem.

Signed-off-by: Bing Zhao <bzhao@marvell.com>

BUG=chrome-os-partner:26511
TEST=hciconfig/hcitool works, a2dp works fine for 12+ hours
on peach_pit.

Change-Id: Id525fd8de181bdf96def10498960694a13e209f4
Reviewed-on: https://chromium-review.googlesource.com/191934
Reviewed-by: hyuckjoo lee <hyuckjoolee345@gmail.com>
Tested-by: hyuckjoo lee <hyuckjoolee345@gmail.com>
Reviewed-by: Bing Zhao <bzhao@marvell.com>
Tested-by: Bing Zhao <bzhao@marvell.com>
Reviewed-by: Scott James Remnant <keybuk@chromium.org>
Commit-Queue: Bing Zhao <bzhao@marvell.com>
(cherry picked from commit 1094d0bdf33f112bbd37aae56f89894d2c640bb1)
Reviewed-on: https://chromium-review.googlesource.com/194119
Commit-Queue: Katie Roberts-Hoffman <katierh@chromium.org>
CHROMIUM: Bluetooth: btmrvl: indicate pscan scheduling instant in a debug event

A vendor specific command is sent to firmware during
initialization to enable this feature. This command is for
SD8897 only.

Signed-off-by: Bing Zhao <bzhao@marvell.com>

BUG=chrome-os-partner:26511
TEST=play video clips with A2DP continuously for 4 hours.

Change-Id: I4550696e55e154d15298c429d6c1f6d7ca0d46c6
Reviewed-on: https://chromium-review.googlesource.com/192240
Reviewed-by: hyuckjoo lee <hyuckjoolee345@gmail.com>
Tested-by: hyuckjoo lee <hyuckjoolee345@gmail.com>
Reviewed-by: Scott James Remnant <keybuk@chromium.org>
Commit-Queue: Bing Zhao <bzhao@marvell.com>
Tested-by: Bing Zhao <bzhao@marvell.com>
(cherry picked from commit d78c9abd8c0aab07d2855326eade2947b7dfe275)
Reviewed-on: https://chromium-review.googlesource.com/194150
Commit-Queue: Katie Roberts-Hoffman <katierh@chromium.org>
CHROMIUM: drm/exynos/dmabuf: Use dma_mmap_attrs to mmap exported GEM buffer

The dmabuf common layer calls the exporter's mmap callback (a) via
dma_buf_mmap_internal when userspace directly calls mmap() on a dmabuf's
fd, or (b) when another kernel driver calls dma_buf_mmap().

In particular, kbase's mmap() handler calls dma_buf_mmap() for any type
BASE_TMEM_IMPORT_TYPE_UMM regions.

Exynos drm's gem objects are allocated with dma_alloc_attrs().
Thus, we can use dma_mmap_attrs() to mmap it to a given vma.

Note: If is_drm_iommu_supported(), the cookie returned by
dma_alloc_attrs() is stored in buf->pages, otherwise, it is stored in
buf->kvaddr.  In either case, it is important to use the correct cookie
when doing the mmap.

This patch fixes the fact that each scatterlist entry may refer to a range
of pages, not just a single page.  Thus for each scatterlist entry we
would actually need to further iterate over all of its pages and insert
them individually using vm_insert_page(), and not just insert the first
one.

In fact, its much simpler to let dma_mmap_attrs() handle the details for
us.

Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>

BUG=chromium:357880
TEST=test_that <peach_pit-dut-ip> graphics_GLBench
   => No "Bad page map in process glbench" errors in /var/log/messages

Change-Id: Ibca788c204eadbafdcc0dfea319da3006554fcfc
Reviewed-on: https://chromium-review.googlesource.com/192239
Reviewed-by: Prathyush Kal <prathyush@chromium.org>
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Tested-by: Daniel Kurtz <djkurtz@chromium.org>
Reviewed-by: Ilja Friedel <ihf@chromium.org>
Commit-Queue: Daniel Kurtz <djkurtz@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/193851
Commit-Queue: Ilja Friedel <ihf@chromium.org>
Tested-by: Ilja Friedel <ihf@chromium.org>
Revert "ARM: dtsi: Remove G2D powerdomain node for Exynos542X"

This reverts commit a0023a0aaf25dbbc838679352861ff87b7caffc4.

G2D powerdomain stuff and SSS stuff is apparently causing problems.
Get us back to a known stable state: R34.

BUG=chrome-os-partner:27880
TEST=suspend_stress_test

Change-Id: I265ccb006d5acda7eaa1fcc6f74d19fb5cf0243d
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/194295
Revert "ARM: dts: exynos5250/542X: add dt node for sss module"

This reverts commit 8fb384d13dfcbdaf6bdaa4cc94d1042bde82d87f.

G2D powerdomain stuff and SSS stuff is apparently causing problems.
Get us back to a known stable state: R34.

BUG=chrome-os-partner:27880
TEST=suspend_stress_test

Change-Id: Ied50ea71e2786ba434baf1ec71b4c91dc3b880ce
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/194296
Revert "clk:exynos-5250: Add gate clock for SSS module"

This reverts commit e24869568f8ad8c9bcb80fa18f4734d0968940fe.

G2D powerdomain stuff and SSS stuff is apparently causing problems.
Get us back to a known stable state: R34.

BUG=chrome-os-partner:27880
TEST=suspend_stress_test

Change-Id: I7ea5156bf9ab302f23e711cfd211e3d4da95af19
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/194297
Revert "arm: exynos: Keep G2D PD enabled during sleep on Exynos542X"

This reverts commit f84afb67d96a302a741b02a957062c37950d220d.

G2D powerdomain stuff and SSS stuff is apparently causing problems.
Get us back to a known stable state: R34.

BUG=chrome-os-partner:27880
TEST=suspend_stress_test

Change-Id: Ia07c0ef2de1954afc82e0199c4849b1114ae7dff
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/193532
Revert "arm: exynos5420: dt: add clock nodes to g2d power domains"

This reverts commit 7b4050ef9562703905887a6086b14dcf77e8f3a7.

G2D powerdomain stuff and SSS stuff is apparently causing problems.
Get us back to a known stable state: R34.

BUG=chrome-os-partner:27880
TEST=suspend_stress_test

Change-Id: I273ca1691953f273e6befad86a003d068b830b03
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/194380
Reviewed-by: Sonny Rao <sonnyrao@chromium.org>
CHROMIUM: ARM: exynos: print exynos5800 instead of exynos5422

Change the name of SoC to 5800 from 5422 in boot logs.
This is done as per requirement from business team.

BUG=chrome-os-partner:27871
TEST=Verified UI, DPMS, and S2R on Peach-pi.

Change-Id: Ibbcfbe2050fae7d44c814499a8c7addb9a1744db
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Olof Johansson <olofj@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/193745
Reviewed-by: Katie Roberts-Hoffman <katierh@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
(cherry picked from commit 56bbd8e71f32b23ad346f22b1117471a3d8a76d4)
Reviewed-on: https://chromium-review.googlesource.com/194352
Commit-Queue: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
CHROMIUM: iwl7000: update rate scaling algorithm

Update the rate scaling algorithm:
 * fix the MIMO delimiter to scale down to SISO more quickly if the
   peer changes settings
 * select correct maximum throughput columns to avoid switching and
   searching too much
 * fix lower rates not always being explored correctly
 * reset statistics when aggregation changes to avoid making decisions
   based on data collected in the other aggregation state
 * fix search cycle rules to be more resilient to changing conditions
 * fall back to legacy rates to avoid traffic stalls when far from AP
 * avoid searching unnecessary columns/rates
 * reset after long idle times to avoid using high rates for too long

BUG=chrome-os-partner:27739
BUG=chrome-os-partner:27740
TEST=throughput tests with high attenuation

Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Originally-reviewed-on: https://chromium-review.googlesource.com/193386
(cherry picked from commit c47085cb5a6d2092b61ed015d12d4cf13c6c555f)
Signed-off-by: Paul Stewart <pstew@chromium.org>

Change-Id: I5ff6f1afd625b135e3d10afce654e9b0b1fa22c4
Reviewed-on: https://chromium-review.googlesource.com/194580
Reviewed-by: Paul Stewart <pstew@chromium.org>
Commit-Queue: Paul Stewart <pstew@chromium.org>
Tested-by: Paul Stewart <pstew@chromium.org>