msm: bam_dmux: tune downlink polling parameters

This change disables the BAM DMUX adaptive timer - this is to address
concerns about drops in TCP throughput for some use cases with the timer
enabled.  It also sets the aggregation to 3ms to save power while not
compromising performance. Power tests show a savings of 3-4% (compared to
having the timer poll the BAM pipe every 1 ms) for LTE (40Mbps downlink and
25Mbps uplink) and HSPA (7Mbps downlink and 384Kbps uplink) with no
degradation in performance.

Change-Id: Ia51eae773723e60d8b051766ad80bfb0a16f5f6d
Signed-off-by: Anurag Singh <anursing@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

msm: bam_dmux: add loopback support

Bam dmux is currently very difficult to isolate and provide measurements
for common metrics, such as throughput and latency.

Add hooks into bam_dmux to allow for a seperate dynamically
loadable loopback module. This allows bam dmux to be isolated, and to
provide more accurate measurements of the above metrics.

Change-Id: I174d900dea73cca27d32a54a908f43728059be30
Signed-off-by: Brent Hronik <bhronik@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

msm: bam_dmux: modify DL low memory algorithm

Bam_dmux maintains a pool of dynamically allocated buffers for the BAM DMA
engine to use as destination memory for Downlink (DL) data.  The allocation
requests for the buffers are done using flags to indicate delays are
tolerable and either the memory or an error should be returned immediately
to bam_dmux as the buffers are normally allocated within various hot paths
inside of the driver.  If a low memory allocation failure is encountered
when attempting to replenish the pool of buffers, bam_dmux will either
attempt the memory allocations later when the next scheduled pool refilling
occurs if there is at least one buffer remaining in the pool, or will
schedule a delayed task to retry the buffer allocation until atleast one
buffer can be put into the pool.

This mechanism of handling low memory situations has two flaws.  First, the
allocation type used by bam_dmux does not trigger the standard low memory
recovery mechanism within the memory management subsystem.  Second, the
peripeheral on the otherside do the DMA engine has a limited hardware based
flow control mechanism that will not release flow control with only one
buffer queued to the DMA engine.

To assist in system recovery, and avoid a data stall, create a cold path
that is tolerant of memory allocation delays and is triggered when the hot
path encounters an allocation failure.

CRs-Fixed: 589665
Change-Id: If72b0eaef285ac6dfd99e97bef1cd7df154e3a48
Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
slim-ngd: NULL pointer check for client buffer

There is the chance of passing NULL pointer by the client
during the Slimbus/Codec transactions. Hence add NULL
pointer check for client buffer aswell.

CRs-Fixed: 608324
Change-Id: I161e8f04401afebb64ed72d5f392a67feb6ec13a
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

slim_ngd: Add NULL pointer check apart from error check

Check against NULL pointer after allocating
the memory for msm_slim_ctrl structure pointer
dynamically to avoid unexpected crashes.

Earlier this pointer is checked only for error
codes. In this patch NULL pointer check is also
added.

Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

slim_msm: Report flow-error and mask apps slimbus port interrupts

Apps side slimbus ports may overflow/underflow if BAM pipes connected
to those ports don't have descriptors scheduled.
Report such errors and mask the port interrupts until BAM pipes have
descriptors scheduled to avoid interrupts firing multiple times.

Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

slim_msm: Signal client's completion for per transfer notification

Slimbus ports are connected to BAM pipes and ports inform the pipe
when descriptor's data transfer is done. Clients queue a completion
per descrptor when that descriptor is processed. This completion will
get overwritten if client queues multiple descriptors. Use
per-transfer user-data as client's completion to avoid this problem.
This also reduces controller-driver involvement in data transfer.

Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

slim_msm: Optimize slimbus data port's connection with BAM pipe

Slimbus data port on apps side can be connected in any diretion (as
source, or as destination). BAM pipe connected to that port should
only be disconnected/reconnected if this port direction changes.
This helps with reducing calls to connect/disconnect BAM pipes.
Allocate descriptors to avoid getting descriptor-space from the
common pool and free them only when the port is deallocated.

Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

slimbus: Fix port allocation and deallocation for manager's ports

Since Manager's ports don't have any direction when allocated, make
sure the direction is not checked when connect-port is called on a
manager port. Ensure that controller's port resourced are freed-up
when dealloc_mgrports is called.

Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

slim_msm: Get platform-specific information from platform-data

Number of pipes available to application processor for data channels,
and product-code field of enumeration address needed for setting
these pipes can be different for different platforms.
Store this platform-specific information in platform-data, and get
it from Device-Tree if applicable.

Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

slimbus: Provide framer-booted notification to slimbus device drivers

When slimbus resets (due to bus reset sequence, or after it shuts down
and comes up), framer boots up and starts clocking the bus.
Devices on the bus may be in undefined state at that time. Callback
is provided to slimbus device drivers so that controller can report
framer-booted notification so that drivers can take necessary action
to put devices in reset state so that they can acquire sync, report
present, and be operational.

Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

slim_msm: ngd: Return success for channel removal during ADSP SSR

Slimbus master component resides on ADSP when this driver is used.
Wehn ADSP restarts, slimbus component goes down and bus is not
operational until it comes back up. During restart, slimbus clients
are notified since their device goes down, and the clients remove
channels and/or disconnect ports. Since bus is not operational,
return success for channel removal/port disconnection calls so that
the channel, port state is consistent with HW (not active, removed)

Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

slim_ngd: Return success for resource removal requests if HW restarts

Channel and ports are removed when HW restarts. Return success to
client channel removal, port disconnection requests when slimbus HW
is restarting.

Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

slim_ngd: Fix logical address notification mechanism

It's possible that multiple slaves report present and expect
corresponding notifications concurrently. Make sure notifications
are sent out in that case. Since notifications cannot be sent when
device doesn't have associated driver, make sure logical address
is not queried in that case.

Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

slim_ngd: Handle runtime-pm resume error gracefully

Runtime-pm resume for satellite driver may fail if ADSP is going
through subsystem-restart. Handle that error, and set runtime-pm's
status to suspended if resume fails. Resume typically fails due to
failure to wake slimbus from pause_clock. Make sure another wakeup
can be tried later when ADSP comes back up

Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

slimbus: Manage channel slots only if framework manages bandwidth

If slimbus controller overrides bandwidth management, channel slots
should not be managed since controller is expected to do that.
Slimbus controller will go into idle mode due to this change when
channel setup/teardown is done. Make sure controller can transition
states correctly in runtime-pm suspend, and system-suspend case.

Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

slim_msm: Rectify physical address type

Make sure physical address type is of correct type.

Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

Slimbus: Correct the conditional check during channel removal

Use actual channel number to check if the channel to be
removed is present in the define_chan list before removing
it, instead of using the internal channel number used by
the frame work.

Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

slim_msm: Add support for external MDM restart

If external MDM restarts when MDM slimbus channels are active, it
is possible that the MDM framer was clocking the bus, and ADSP was
not active. Make sure apps wakes up ADSP and checks the framer status
so that slimbus is clocked by ADSP instead of MDM, and communication
over slimbus is restored.

Signed-off-by: Naveen Kaje <nkaje@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

ARM: dts: msm: Add pipe-ownership and product-code for slimbus in 8974

To setup data channels from application processor with at least one
endpoint in memory, slimbus driver requires information about pipes
owned by the apps processor, and the product-code of the controller.
Add this information to Device-Tree for MSM slimbus controller on
8974.

Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

slimbus: Fix logical address notification mechanism

Make sure device-up/down notifications don't involve race condition,
and sub-system restart in such cases is handled gracefully

Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

slim_ngd: Handle error flags before handling SENT flag

It's possible that error flags were set alongwith SENT flag for
TX transaction status. In such a scenario, error flag status should
be handled (and SENT flag should be cleared). Move error-flag
handling ahead of SENT flag handling to avoid interrupt being called
twice, and completion being set twice.

Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

slimbus: Enable clients to send user messages to devices.

Slimbus protocol allows user messages of destination referred, or
source referred type to be sent to a slimbus device.
Provide framework to support such messages. Note that, controller
may not support all user messages.

Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

slim_ngd: Support REPEAT_CHANGE_VALUE user message

REPEAT_CHANGE_VALUE user message is used to transfer high amount of
messaging data efficiently.

Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

slimbus: Use physical address type where physical address is used

Use physical address type for buffers using physical address.
(e.g. interaction with data-mover engine)

Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

slim_ngd: Use QMI server up notification instead of APR for probing

Slimbus QMI-server can reside on any other remote processor.
Avoid depedency on APR (for APR state) by utilizing QMI server-up
notification for slimbus hardware initialization from apps processor.

Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

slim-ngd: change log level of slave_notify completion

Change the logging of slave_notify completion to debug to avoid
excessive logging.

Signed-off-by: Naveen Kaje <nkaje@codeaurora.org>
Signed-off-by: Shruthi Krishna <skrish@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

Slim_ngd: Modify waiting mechanism in kthread

wait_for_completion_timeout() is not a good option in
kthread as it leads to scheduling the kthread on the every timeout.
Hence modify it to wait_for_completion() from
wait_for_completion_timeout().

Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

ARM: dts: enable mdm restart.

Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

Slim_ngd: Don't create the device node per SSR

Observe the device crash due to the device node
gets created per ADSP SSR when the logical address
query succeeds at the first attempt.
This patch makes sure that the device node creation
happened only once  by declaring another variable to
track the logical address retry.

Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

slim_ngd: notify slaves in some MDM restart scenarios

If MDM restarts when it had active framer, bus may lose sync.
Send device-down notification if that happens, and corresponding
reset-device and device-up notifications to slaves so that they
can act to restore their devices' communication over slimbus

Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
Signed-off-by: Naveen Kaje <nkaje@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

msm-slim-ngd: Read configurable external modem identifier

When an external modem is used, read the config from dt and use the
value in subsystem restart callback registration.

Signed-off-by: Naveen Kaje <nkaje@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

slim_msm: Handle external-modem shutdown differently than restart

External modem may shutdown in cases other than subsystem-restart.
In that case, the power-up notification may not happen.
Handle such a scenario and make sure runtime-pm vote is not held
for more time than required, and that slave-device up/down/reset
notifications happen as expected if slimbus was down.

Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
hells_defconfig: hC-b7.1
Revert "Apply arch: arm: lib: optimize memcpy for cortex-A15 to memutils"

This reverts commit 5f266ebd51938e2d37272bc6772168e666ab450f.
Revert "hells_defconfig: Enable memcpy optimizations for cortex A-15"

This reverts commit cd77f077ec980ab5695072cc72684efc128f294a.
Revert "arch: arm: lib: optimize memcpy for cortex-A15"

This reverts commit 2514854cf2320f2921c967d7070949716dcf1788.
Revert "msm: memutils: memcpy, memmove, copy_page optimization"

c17187cf1c653c87c1ae893a327e2b74165722fc
msm: memutils: memcpy, memmove, copy_page optimization

Preload farther to take advantage of the memory bus, and assume
64-byte cache lines.  Unroll some pairs of ldm/stm as well, for
unexplainable reasons.

Future enhancements should include,

- #define for how far to preload, possibly defined separately for
  memcpy, copy_*_user
- Tuning for misaligned buffers
- Tuning for memmove
- Tuning for small buffers
- Understanding mechanism behind ldm/stm unroll causing some gains
  in copy_to_user

BASELINE (msm8960pro):
======================================================================
memcpy 1000MB at 5MB       : took 808850 usec, bandwidth 1236.236 MB/s
copy_to_user 1000MB at 5MB : took 810071 usec, bandwidth 1234.234 MB/s
copy_from_user 1000MB at 5M: took 942926 usec, bandwidth 1060.060 MB/s
memmove 1000GB at 5MB      : took 848588 usec, bandwidth 1178.178 MB/s
copy_to_user 1000GB at 4kB : took 847916 usec, bandwidth 1179.179 MB/s
copy_from_user 1000GB at 4k: took 935113 usec, bandwidth 1069.069 MB/s
copy_page 1000GB at 4kB    : took 779459 usec, bandwidth 1282.282 MB/s

THIS PATCH:
======================================================================
memcpy 1000MB at 5MB       : took 346223 usec, bandwidth 2888.888 MB/s
copy_to_user 1000MB at 5MB : took 348084 usec, bandwidth 2872.872 MB/s
copy_from_user 1000MB at 5M: took 348176 usec, bandwidth 2872.872 MB/s
memmove 1000GB at 5MB      : took 348267 usec, bandwidth 2871.871 MB/s
copy_to_user 1000GB at 4kB : took 377018 usec, bandwidth 2652.652 MB/s
copy_from_user 1000GB at 4k: took 371829 usec, bandwidth 2689.689 MB/s
copy_page 1000GB at 4kB    : took 383763 usec, bandwidth 2605.605 MB/s

Signed-off-by: Chris Fries <C.Fries@motorola.com>

arm: lib: Fix makefile bug

When HAS_MACH_MEMUTILS is defined, two version of memcpy.S would
be built at the same time, fix the issue here.

Signed-off-by: Hong-Mei Li <a21834@motorola.com>
Reviewed-on: http://gerrit.mot.com/629464
SLTApproved: Slta Waiver <sltawvr@motorola.com>
Tested-by: Jira Key <jirakey@motorola.com>
Reviewed-by: Yi-Wei Zhao <gbjc64@motorola.com>
Submit-Approved: Jira Key <jirakey@motorola.com>

msm: memutils: memcpy, memmove optimization

1. To fit 8x26 64-bytes cache line size, we change preload steps as 64Bytes.
2. According to tune result, change preload distance as 5 cache lines.
3. According to tune result, re-arrange the ld/str order as back-to-back
   for copy_from_user.

The markable improvement:
	memcpy : 5%
	copy_to_user : 9%
	copy_from_user : 13%
	memmove : 37%

Raw data is as below:

BASELINE:
	memcpy 1000MB at 5MB       : took 1547098 usec, bandwidth 646.646 MB/s
	copy_to_user 1000MB at 5MB : took 1704308 usec, bandwidth 586.586 MB/s
	copy_from_user 1000MB at 5M: took 1777090 usec, bandwidth 562.562 MB/s
	memmove 1000GB at 5MB      : took 1066205 usec, bandwidth 937.937 MB/s
	copy_to_user 1000GB at 4kB : took 1774866 usec, bandwidth 563.563 MB/s
	copy_from_user 1000GB at 4k: took 1797654 usec, bandwidth 556.556 MB/s
	copy_page 1000GB at 4kB    : took 1644606 usec, bandwidth 608.608 MB/s
	memmove 1000GB at 4kB      : took 1236227 usec, bandwidth 808.808 MB/s

THIS PATCH:
	memcpy 1000MB at 5MB       : took 1475835 usec, bandwidth 677.677 MB/s
	copy_to_user 1000MB at 5MB : took 1559060 usec, bandwidth 641.641 MB/s
	copy_from_user 1000MB at 5M: took 1561603 usec, bandwidth 640.640 MB/s
	memmove 1000GB at 5MB      : took 861664 usec, bandwidth 1160.160 MB/s
	copy_to_user 1000GB at 4kB : took 1673501 usec, bandwidth 597.597 MB/s
	copy_from_user 1000GB at 4k: took 1674006 usec, bandwidth 597.597 MB/s
	copy_page 1000GB at 4kB    : took 1691358 usec, bandwidth 591.591 MB/s
	memmove 1000GB at 4kB      : took 882985 usec, bandwidth 1132.132 MB/s

Signed-off-by: Hong-Mei Li <a21834@motorola.com>
Reviewed-on: http://gerrit.pcs.mot.com/550383
SLT-Approved: Slta Waiver <sltawvr@motorola.com>
Tested-by: Jira Key <jirakey@motorola.com>
Reviewed-by: Klocwork kwcheck <klocwork-kwcheck@sourceforge.mot.com>
Reviewed-by: Check Patch <CHEKPACH@motorola.com>
Reviewed-by: Yi-Wei Zhao <gbjc64@motorola.com>
Submit-Approved: Jira Key <jirakey@motorola.com>

msm: memutils: 8974: memcpy, memmove optimization

According to tune result, change preload distance to 10
cache lines for 8974.
And considering bkk-b is sharing code for 8974, 8226, 8x16,
we seperate the code for 8974 specially.

The markable improvement:
    memcpy : 67%
    copy_to_user : 37%
    copy_from_user : 37%
    memmove : 70%

Raw data is as below:

BEFORE:
	memcpy 1000MB at 5MB       : took 659744 usec, bandwidth 1515.515 MB/s
	copy_to_user 1000MB at 5MB : took 681202 usec, bandwidth 1467.467 MB/s
	copy_from_user 1000MB at 5M: took 682052 usec, bandwidth 1466.466 MB/s
	memmove 1000GB at 5MB      : took 763133 usec, bandwidth 1310.310 MB/s
	copy_to_user 1000GB at 4kB : took 714487 usec, bandwidth 1399.399 MB/s
	copy_from_user 1000GB at 4k: took 699861 usec, bandwidth 1428.428 MB/s
	copy_page 1000GB at 4kB    : took 634857 usec, bandwidth 1575.575 MB/s
	memmove 1000GB at 4kB      : took 791389 usec, bandwidth 1263.263 MB/s
	memcpy 1000MB at 5MB       : took 659744 usec, bandwidth 1515.515 MB/s

AFTER:
	memcpy 1000MB at 5MB       : took 395178 usec, bandwidth 2530.530 MB/s
	copy_to_user 1000MB at 5MB : took 497667 usec, bandwidth 2009.009 MB/s
	copy_from_user 1000MB at 5M: took 496832 usec, bandwidth 2012.012 MB/s
	memmove 1000GB at 5MB      : took 449217 usec, bandwidth 2226.226 MB/s
	copy_to_user 1000GB at 4kB : took 489006 usec, bandwidth 2044.044 MB/s
	copy_from_user 1000GB at 4k: took 483982 usec, bandwidth 2066.066 MB/s
	copy_page 1000GB at 4kB    : took 377170 usec, bandwidth 2651.651 MB/s
	memmove 1000GB at 4kB      : took 483015 usec, bandwidth 2070.070 MB/s

Signed-off-by: Hong-Mei Li <a21834@motorola.com>
Reviewed-on: http://gerrit.mot.com/634422
Tested-by: Jira Key <jirakey@motorola.com>
Reviewed-by: Yi-Wei Zhao <gbjc64@motorola.com>
SLTApproved: Christopher Fries <c.fries@motorola.com>
Reviewed-by: John Zafiris <johnz@motorola.com>
Submit-Approved: Jira Key <jirakey@motorola.com>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
hells_defconfig: Enable MEMUTILS
hells_defconfig: hC-b7.2
Add build-script

credits to @anarkia1976
hells_defconfig: Remove Localversion
asm-generic: io: don't perform swab during {in,out} string functions

The {in,out}s{b,w,l} functions are designed to operate on a stream of
bytes and therefore should not perform any byte-swapping, regardless of
the CPU byte order.

This patch fixes the generic IO header so that {in,out}s{b,w,l} call the
__raw_{read,write} functions directly rather than going via the
endian-correcting accessors.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Ben Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
ARM: nommu: provide dummy cpu_switch_mm implementation

cpu_switch_mm is a logical nop on nommu systems, so define it as such
when !CONFIG_MMU.

Signed-off-by: Will Deacon <will.deacon@arm.com>
ARM: mpu: add PMSA related registers and bitfields to existing headers

This patch adds the following definitions relevant to the PMSA:

Add SCTLR bit 17, (CR_BR - Background Region bit) to the list of CR_*
bitfields. This bit determines whether to use the architecturally defined
memory map

Add the MPUIR to the available registers when using read_cpuid macro. The
MPUIR is the MPU type register.

Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
CC:"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>
Signed-off-by: Jake Weinstein <xboxlover360@gmail.com>
ARM: mpu: add header for MPU register layouts and region data

This commit adds definitions relevant to the ARM v7 PMSA compliant MPU.

The register layouts and region configuration data is made accessible to asm
as well as C-code so that it can be used in early bring-up of the MPU.

The mpu region information structs assume that the properties for the I/D side
are the same, though the implementation could be trivially extended for future
platforms where this is no-longer true.

The MPU_*_REGION defines are used for the basic, static MPU region setup.

Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Jake Weinstein <xboxlover360@gmail.com>
ARM: mpu: add early bring-up code for the ARMv7 PMSA-compliant MPU

This patch adds initial support for using the MPU, which is necessary for
SMP operation on PMSAv7 processors because it is the only way to ensure
memory is shared. This is an initial patch and full SMP support is added
later in this series.

The setup of the MPU is performed in a way analagous to that for the MMU:
Very early initialisation before the C environment is brought up, followed
by a sanity check and more complete initialisation in C.

This patch provides the simplest possible memory region configuration:
MPU_PROBE_REGION: Reserved for probing MPU details, not enabled
MPU_BG_REGION: A 'background' region that specifies all memory strongly ordered
MPU_RAM_REGION: A single shared, cacheable, normal region for the valid RAM.

In this early initialisation code we simply map the whole of the address
space with the BG_REGION and (at least) the kernel with the RAM_REGION. The
MPU has region alignment constraints that require us to round past the end
of the kernel.

As region 2 has a higher priority than region 1, it overrides the strongly-
ordered behaviour for RAM only.

Subsequent patches will add more complete initialisation from the C-world
and support for bringing up secondary CPUs.

Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
CC: Hyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: Jake Weinstein <xboxlover360@gmail.com>

Conflicts:
	arch/arm/kernel/head-nommu.S
ARM: mpu: add MPU initialisation for secondary cores

The MPU initialisation on the primary core is performed in two stages, one
minimal stage to ensure the CPU can boot and a second one after
sanity_check_meminfo. As the memory configuration is known by the time we
boot secondary cores only a single step is necessary, provided the values
for DRSR are passed to secondaries.

This patch implements this arrangement. The configuration generated for the
MPU regions is made available to the secondary core, which can then use the
asm MPU intialisation code to program a complete region configuration.

This is necessary for SMP configurations without an MMU, as the MPU
initialisation is the only way to ensure that memory is specified as
'shared'.

Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
CC: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Jake Weinstein <xboxlover360@gmail.com>
ARM: prefetch: remove redundant "cc" clobber

The pld instruction does not affect the condition flags, so don't bother
clobbering them.

Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
ARM: atomics: prefetch the destination word for write prior to strex

The cost of changing a cacheline from shared to exclusive state can be
significant, especially when this is triggered by an exclusive store,
since it may result in having to retry the transaction.

This patch prefixes our atomic access implementations with pldw
instructions (on CPUs which support them) to try and grab the line in
exclusive state from the start. Only the barrier-less functions are
updated, since memory barriers can limit the usefulness of prefetching
data.

Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>