[FastISel][X86] Only fold the cmp into the select when both instructions are in the same basic block.

If the cmp is in a different basic block, then it is possible that not all
operands of that compare have defined registers. This can happen when one of
the operands to the cmp is a load and the load gets folded into the cmp. In
this case FastISel will skip the load instruction and the vreg is never
defined.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211730 91177308-0d34-0410-b5e6-96231b3b80d8
Mention that Phabricator users should subscribe to *-commits

This probably explains why a lot of messages get lost for first time
Phabricator users.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211731 91177308-0d34-0410-b5e6-96231b3b80d8