platform_get_irq: Revert to platform_get_resource if of_irq_get fails

commit aff008ad813c7cf3cfe7b532e7ba2c526c136f22 upstream.

Commits 9ec36ca (of/irq: do irq resolution in platform_get_irq)
and ad69674 (of/irq: do irq resolution in platform_get_irq_byname)
change the semantics of platform_get_irq and platform_get_irq_byname
to always rely on devicetree information if devicetree is enabled
and if a devicetree node is attached to the device. The functions
now return an error if the devicetree data does not include interrupt
information, even if the information is available as platform resource
data.

This causes mfd client drivers to fail if the interrupt number is
passed via platform resources. Therefore, if of_irq_get fails, try
platform_get_resource as method of last resort. This restores the
original functionality for drivers depending on platform resources
to get irq information.

Cc: Russell King <linux@arm.linux.org.uk>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Acked-by: Rob Herring <robh@kernel.org>
[ Guenter Roeck: backported to 3.15 ]
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Linux 3.14.15
Merge tag 'v3.14.15' of http://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable into ti-linux-3.14.y

This is the 3.14.15 stable release

* tag 'v3.14.15' of http://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable: (30 commits)
  Linux 3.14.15
  platform_get_irq: Revert to platform_get_resource if of_irq_get fails
  nl80211: move set_qos_map command into split state
  x86/efi: Include a .bss section within the PE/COFF headers
  Fix gcc-4.9.0 miscompilation of load_balance() in scheduler
  mm: hugetlb: fix copy_hugetlb_page_range()
  drm/radeon: fix cut and paste issue for hawaii.
  drm/radeon: fix irq ring buffer overflow handling
  x86_32, entry: Store badsys error code in %eax
  fs: umount on symlink leaks mnt count
  parport: fix menu breakage
  hwmon: (smsc47m192) Fix temperature limit and vrm write operations
  parisc: Remove SA_RESTORER define
  coredump: fix the setting of PF_DUMPCORE
  Input: fix defuzzing logic
  Input: synaptics - add min/max quirk for pnp-id LEN2002 (Edge E531)
  slab_common: fix the check for duplicate slab names
  tracing: Fix wraparound problems in "uptime" trace clock
  blkcg: don't call into policy draining if root_blkg is already gone
  ahci: add support for the Promise FastTrak TX8660 SATA HBA (ahci mode)
  ...

Signed-off-by: Dan Murphy <DMurphy@ti.com>
doc: dt/bindings: input: introduce palmas power button description

Many palmas family of PMICs have support for interrupt based power
button. This allows the device to notify the processor of external
push button events over the shared palmas interrupt.

Document the hardware support for the same.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Input: misc: introduce palmas-pwrbutton

Many palmas family of PMICs have support for interrupt based power
button. This allows the device to notify the processor of external
push button events over the shared palmas interrupt. However, this
event is generated only during a "press" operation. Software is
supposed to poll(sigh!) for detecting a release event.

The PMIC also supports ability to power off independent of the
software decisions when the button is pressed for a long duration if
the PMIC is appropriately configured on the platform.

Even though the function is similar to twl4030_pwrbutton, it is
substantially different in operation to belong to a new driver of it's
own.

Based on original work done by Girish S Ghongdemath <girishsg@ti.com>

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
ARM: dts: omap5-uevm: Add Palmas RTC and power button support

Palmas on OMAP5uevm has support for both RTC and power button, so enable
both.

Signed-off-by: Aparna Balasubramanian <aparnab@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
ARM: dts: dra72-evm: Support tps power button

Support tps power button as a event source - This is SW7 (PB/WAKE)

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
ARM: omap: edma: add suspend suspend/resume hooks

This patch makes the edma driver resume correctly after suspend. Tested
on an AM33xx platform with cyclic audio streams and omap_hsmmc.

All information can be reconstructed by already known runtime
information.

As we now use some functions that were previously only used from __init
context, annotations had to be dropped.

[nm@ti.com: added error handling for runtime + suspend_late/early_resume]
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Daniel Mack <zonque@gmail.com>
Tested-by: Joel Fernandes <joelf@ti.com>
Acked-by: Joel Fernandes <joelf@ti.com>
[d-gerlach@ti.com: updated to remove queue_tc_mapping use]

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
ARM: OMAP2+: timer: Add suspend-resume callbacks for clkevent device

OMAP timer code registers two timers - one as clocksource
and one as clockevent. Since AM33XX has only one usable timer
in the WKUP domain one of the timers needs suspend-resume
support to restore the configuration to pre-suspend state.

commit adc78e6 (timekeeping: Add suspend and resume
of clock event devices) introduced .suspend and .resume
callbacks for clock event devices. Leverages these
callbacks to have AM33XX clockevent timer which is
in not in WKUP domain to behave properly across system
suspend.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
ARM: AM43x: Add suspend/resume callbacks for clockevent

With gptimers being used as both the clockevent and clocksource
on AM43x, we need the suspend/resume callbacks populated to idle
the non wakeup domain gptimer in order to achieve system low
power state in suspend.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
ARM: OMAP2+: Use pdata-quirks for wkup_m3 deassert_hardreset

Use pdata-quirks to reset the wkup_m3 during boot.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Documentation: dt: add ti,am3353_wkup_m3 bindings

Add the device tree bindings document for am3353 wkup_m3.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
CC: Ohad Ben-Cohen <ohad@wizery.com>
CC: Benoit Cousson <bcousson@baylibre.com>
remoteproc: wkup_m3: Add wkup_m3 remote proc driver

Add a remoteproc driver to load the firmware for and boot the wkup_m3
present on am33xx. The wkup_m3 is an integrated Cortex M3 that allows
the SoC to enter the lowest possible power state by taking control from
the MPU after it has gone into its own low power state and shutting off
any additional peripherals.

Communication between the MPU and CM3 is handled by several IPC
registers in the control module and a mailbox. An API is exposed for
programming the aforementioned IPC registers and notifying the wkup_m3
of pending data using the mailbox. The wkup_m3 has the ability to
trigger an interrupt back to the MPU to allow for bidirectional
communication through these registers.

Two callbacks are provided. rproc_ready allows code to hook into the
driver to see when firmware has been loaded and execute other code and
txev_handler allows external code to run when the wkup_m3 triggers an
interrupt back to the m3.

The driver expects a resource table to be present in the wkup_m3 to
define the required memory resources needed by wkup_m3, at least the
data memory so that the firmware can be copied for the proper place for
execution.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
CC: Ohad Ben-Cohen <ohad@wizery.com>
ARM: dts: am33xx: Update wkup_m3 node

Allow interrupt for wkup_m3 to be set from DT, add regs for
IPC regs to allow pm code to communicate with wkup_m3, and add data
needed for mailbox channel.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
CC: Ohad Ben-Cohen <ohad@wizery.com>
CC: Benoit Cousson <bcousson@baylibre.com>
ARM: OMAP2+: AM33XX: Reserve memory to comply with EMIF spec

SDRAM controller on AM33XX requires that a modification of certain
bit-fields in PWR_MGMT_CTRL register (ref. section 7.3.5.13 in
AM335x-Rev H) is followed by a dummy read access to SDRAM. This
scenario arises when entering a low power state like DeepSleep.
To ensure that the read is not from a cached region we reserve
some memory during bootup using the arm_memblock_steal() API. The
original call to omap_reserve is removed as it is not used in any
way on am335x.

A subsequent patch will pass along the location of the reserved
memory location to the AM335x suspend handler which modifies the
PWR_MGMT_CTRL register in the EMIF.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
ARM: OMAP2+: AM33XX: Add assembly code for PM operations

In preparation for suspend-resume support for AM33XX, add
the assembly file with the code which is copied to internal
memory (OCMC RAM) during bootup and runs from there.

As part of the low power entry (DeepSleep0 mode in AM33XX TRM),
the code running from OCMC RAM does the following
1. Stores the EMIF configuration
2. Puts external memory in self-refresh
3. Disables EMIF clock
4. Executes WFI after writing to MPU_CLKCTRL register.

If no interrupts have come, WFI execution on MPU gets registered
as an interrupt with the WKUP-M3. WKUP-M3 takes care of disabling
some clocks which MPU should not (L3, L4, OCMC RAM etc) and takes
care of clockdomain and powerdomain transitions as part of the
DeepSleep0 mode entry.

In case a late interrupt comes in, WFI ends up as a NOP and MPU
continues execution from internal memory. The 'abort path' code
undoes whatever was done as part of the low power entry and indicates
a suspend failure by passing a non-zero value to the cpu_resume routine.

The 'resume path' code is similar to the 'abort path' with the key
difference of MMU being enabled in the 'abort path' but being
disabled in the 'resume path' due to MPU getting powered off.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
ARM: OMAP2+: AM33XX: Basic suspend resume support

AM335x supports various low power modes as documented
in section 8.1.4.3 of the AM335x Technical Reference Manual.

DeepSleep0 mode offers the lowest power mode with limited
wakeup sources without a system reboot and is mapped as
the suspend state in the kernel. In this state, MPU and
PER domains are turned off with the internal RAM held in
retention to facilitate the resume process. As part of
the boot process, the assembly code is copied over to OCMCRAM
using the OMAP SRAM code so it can be executed to turn of the
EMIF.

AM335x has a Cortex-M3 (WKUP_M3) which assists the MPU
in DeepSleep0 and Standby entry and exit. WKUP_M3 takes care
of the clockdomain and powerdomain transitions based on the
intended low power state. MPU needs to load the appropriate
WKUP_M3 binary onto the WKUP_M3 memory space before it can
leverage any of the PM features like DeepSleep.

The WKUP_M3 is managed by a remoteproc driver. The PM code hooks
into the remoteproc driver through an rproc_ready callback to
allow PM features to become available once the firmware for the
wkup_m3 has been loaded. This code maintains its own state machine
for the wkup_m3 so that it can be used in the manner intended for
low power modes.

In the current implementation when the suspend process
is initiated, MPU interrupts the WKUP_M3 to let it know about
the intent of entering DeepSleep0 and waits for an ACK. When
the ACK is received MPU continues with its suspend process
to suspend all the drivers and then jumps to assembly in
OCMC RAM. The assembly code puts the external RAM in self-refresh
mode, gates the MPU clock, and then finally executes the WFI
instruction. Execution of the WFI instruction with MPU clock gated
triggers another interrupt to the WKUP_M3 which then continues
with the power down sequence wherein the clockdomain and
powerdomain transition takes place. As part of the sleep sequence,
WKUP_M3 unmasks the interrupt lines for the wakeup sources. WFI
execution on WKUP_M3 causes the hardware to disable the main
oscillator of the SoC and from here system remains in sleep state
until a wake source brings the system into resume path.

When a wakeup event occurs, WKUP_M3 starts the power-up
sequence by switching on the power domains and finally
enabling the clock to MPU. Since the MPU gets powered down
as part of the sleep sequence in the resume path ROM code
starts executing. The ROM code detects a wakeup from sleep
and then jumps to the resume location in OCMC which was
populated in one of the IPC registers as part of the suspend
sequence.

Code is based on work by Vaibhav Bedia.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
ARM: OMAP2+: AM33XX: Hookup AM33XX PM code into OMAP builds

With all the requisite changes in place we can now enable the basic
PM support for AM33xx. This patch updates the various OMAP files
to enable suspend-resume on AM33xx.

Because the suspend resume functionality is different on AM33xx
than other OMAP platforms due to the need for M3 firmware and an
IPC channel to be in place, separate PM ops are used instead of
omap_pm_ops. These are now set using omap2_common_suspend_init
so the AM33xx can make a decision at runtime to enable suspend based
on the availabilty of aforementioned requirements.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
ARM: OMAP2+: AM33XX: PM: Add standby support

Standby is one of the Power Modes supported on AM335x.
In Standby Mode, Everything is preserved including SDRAM. Only required
module clocks are enabled, PLLs are put in bypass and MPU is power
gated.
This Mode has higher power consumption than DeepSleep0 but better wake
latency.

Add support for standby mode
- MPU Power domain is OFF
- PER Power domain is ON
- Master Oscillator is ON

To enter standby mode, echo "standby" to PM State sysfs entry
        "echo standby > /sys/power/state"

Currently UART, GPIO & RTC wakeup events are tested on am335x-evm.

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
ARM: OMAP2+: AM43XX: Add reserve function for AM43XX

AM33XX and AM43XX both share the same map_io function in
board_generic.c, but this function calls am33xx_dram_sync_init
which depends on a call to am33xx_reserve which is not set for
AM43XX. Add this to DT_MACHINE_INIT for AM43XX as it will
be needed later for suspend/resume but is needed now for boot.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>