target-ppc: ppc64 target's virtio can be either endian. (v4)

We base it on the OS endian, as reflected by the endianness of the
interrupt vectors (handled through the ILE bit in the LPCR register).

This patch implements virtio_get_byteswap() over LPCR.

Using first_cpu to fetch the registers from KVM may look arbitrary
and awkward, but it is okay because KVM sets/unsets the ILE bit on
all CPUs.

Changes in v4:
- got rid of useless synchronize call.
Changes in v3:
-  dropped the explicit calls to kvm_[get|put]_one_reg as LPCR is
   now properly handled by the generic SPR code.
Changes in v2:
- call cpu_synchronize_state() instead of kvm_arch_get_registers().

Suggested-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Greg Kurz <gkurz@linux.vnet.ibm.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
target-ppc: gdbstub allow byte swapping for reading/writing registers

This patch allows registers to be properly read from and written to
when using the gdbstub to debug a ppc guest running in little
endian mode.  It accomplishes this goal by byte swapping the values of
any registers if the MSR:LE value is set.

Signed-off-by: Thomas Falcon <tlfalcon@linux.vnet.ibm.com>
target-ppc: Fix Book3S PMU SPRs

Most of the PMU SPRs were wrong on Book3S.

Signed-off-by: Anton Blanchard <anton@samba.org>
target-ppc: Add PMC7/8 to 970

970 CPUs have PMC7/8. Create gen_spr_970 to avoid replicating
it 3 times, and simplify the existing code.

Signed-off-by: Anton Blanchard <anton@samba.org>