Merge remote-tracking branch 'origin/binutils-2_24-branch' into linaro_binutils-2_24-branch
ld/ARM: Increase maximum page size to 64kB

Increase the maximum page size to 64kB and align the TEXT_START_ADDR
to a 64kB boundary. This brings AArch32 in line with AArch64 and
improves compatability under certain conditions.

bfd/ChangeLog:

2014-07-08  Will Newton  <will.newton@linaro.org>

	* elf32-arm.c (ELF_MAXPAGESIZE): Increase the default
	value to 64kB and remove custom setting for NaCl.

ld/ChangeLog:

2014-07-08  Will Newton  <will.newton@linaro.org>

	* emulparams/armelf_linux.sh (TEXT_START_ADDR): Increase
	alignment to 64kB boundary.

ld/testsuite/ChangeLog:

2014-07-08  Will Newton  <will.newton@linaro.org>

	* ld-arm/arm-lib.ld: Increase MAXPAGESIZE value to
	match bfd.
	* ld-arm/cortex-a8-fix-bl-rel-plt.d: Update offsets to
	take into account increased segment alignment.
	* ld-arm/ifunc-gdesc.r: Likewise.
	* ld-arm/tls-lib.d: Likewise.
Enable elf_backend_rela_normal for AArch64

  If we are generating non-relocatable object and --emit-relocs specified,
  aarch64 ld is actually generating wrong addend for rela entry when
  relocate against local symbol.

  for example, for simple testcase

  foo.c
  ===

  const char * const a = "foo";

  const char *
  foo ()
  {
    return a;
  }

  bar.c
  ===

  const char * const b = "bar";

  const char * bar ()
  {
    return b;
  }

  aarch64-none-linux-gnu-ld --emit-relocs -o x.o  foo.o bar.o
  aarch64-none-linux-gnu-readelf -r x.o

   ... R_AARCH64_ADR_PRE 0000000000400018 .rodata + 0
   ... R_AARCH64_ADD_ABS 0000000000400018 .rodata + 0
   ... R_AARCH64_ADR_PRE 0000000000400018 .rodata + 0
   ... R_AARCH64_ADD_ABS 0000000000400018 .rodata + 0

   while it should be:

   ... R_AARCH64_ADR_PRE 0000000000400018 .rodata + 0
   ... R_AARCH64_ADD_ABS 0000000000400018 .rodata + 0
   ... R_AARCH64_ADR_PRE 0000000000400018 .rodata + 10
   ... R_AARCH64_ADD_ABS 0000000000400018 .rodata + 10

   bfd generic code could actually handle this properly, but only when
   elf_backend_rela_normal set to '1'.

   this patch enable this and remove those target specific hack.

    bfd/
      * elfnn-aarch64.c (elf_backend_rela_normal): Set to 1.
      (elfNN_aarch64_relocate_section): Remove duplicated addend adjustment
      when info->relocatable be true.

    ld/testsuite/
      * ld-aarch64/emit-relocs-local-addend-bar.s: * New source file.
      * ld-aarch64/emit-relocs-local-addend-foo.s: * Likewise.
      * ld-aarch64/emit-relocs-local-addend.d: * New testcase.
      * ld-aarch64/local-addend-r.d: Likewise.
[AArch64] Fix ld testcase linker script glitch.

  Specify -T relocs.ld for emit-relocs-local-addend.d to be consistent
  will all other emit-relocs* testcases

  ld/testsuite/
    * ld-aarch64/emit-relocs-local-addend.d: Use target linker script.
Fix PR 16722 by adding support for 8-byte vector constants.

 * config/tc-arm.c (literal_pool): New field "alignment".
  (find_or_make_literal_pool): Initialize "alignment" to 2.
  (s_ltorg): Align the pool using value of "alignment"
  (parse_big_immediate): New parameter "in_exp". Return
  parsed expression if "in_exp" is not null.
  (parse_address_main): Invoke "parse_big_immediate" for
  constant parameter.
  (add_to_lit_pool): Add one parameter 'nbytes'.
  Split 8 byte entry into two 4 byte entry.
  Add padding to align 8 byte entry to 8 byte boundary.
  (encode_arm_cp_address): Generate literal pool entry if possible.
  (move_or_literal_pool): Generate entry for vldr case.
  (enum lit_type): New enum type.
  (do_ldst): Use new enum type.
  (do_ldstv4): Likewise.
  (do_t_ldst): Likewise.
  (neon_write_immbits): Support Thumb-2 mode.

  * gas/arm/ldconst.s: Add test cases for symbol literal.
  * gas/arm/ldconst.d: Likewise.
  * gas/arm/vldconst.s: Add test cases for vldr.
  * gas/arm/thumb2_vpool.s: Likewise.
  * gas/arm/vldconst.d: New pattern for little-endian.
  * gas/arm/thumb2_vpool.d: Likewise.
  * gas/arm/vldconst_be.d: New pattern for big-endian.
  * gas/arm/thumb2_vpool_be.d: Likewise.
[ARM] Fix 32-bit host build failure.

  gas/
    * config/tc-arm.c (add_to_lit_pool): Use "inst.operands[1].imm" for * sign
    extension.  Casting the type of imm1 and imm2 to offsetT.  Fix one logic
    error when checking X_op.
bfd/version.h: Update version for 2014.08 release
bfd/version.h: Bump version
Merge remote-tracking branch 'origin/binutils-2_24-branch' into linaro_binutils-2_24-branch
bfd/ChangeLog
2014-08-21  Tony Wang  <tony.wang@arm.com>

	* elf32-arm.c (elf32_arm_final_link_relocate): Implement
	the veneer routine for R_ARM_THM_JUMP19.
	(arm_type_of_stub): Add conditional clause for R_ARM_THM_JUMP19
	(elf32_arm_size_stub): Ditto.

ld/testsuite/ChangeLog
2014-08-21  Tony Wang  <tony.wang@arm.com>

	* ld-arm/jump-reloc-veneers-cond.s: New test.
	* ld-arm/farcall-cond-thumb-arm.s: Ditto.
	* ld-arm/jump-reloc-veneers-cond-short.d: Expected output
	for target without a veneer generation.
	* ld-arm/jump-reloc-veneers-cond-long.d: Expected output
	for target with a veneer generation.
	* ld-arm/farcall-cond-thumb-arm.d: Expected output for
	inter working veneer generation.
	* ld-arm/arm-elf.exp: Add tests for conditional branch veneer.
[ARM] Fix vcmp with #0.0

	* config/tc-arm.c (parse_ifimm_zero): New function.
	(enum operand_parse_code): Add OP_RSVD_FI0 value.
	(parse_operands): Handle OP_RSVD_FI0.
	(asm_opcode_insns): Use RSVD_FI0 for second operand of vcmp, vcmpe.

	* gas/arm/ual-vcmp.s: New file.
	* gas/arm/ual-vcmp.d: Likewise.
	* gas/arm/vcmp-zero-bad.s: Likewise.
	* gas/arm/vcmp-zero-bad.d: Likewise.
	* gas/arm/vcmp-zero-bad.l: Likewise.
ARM: Add support for armeb-*-eabi*

At the moment it is possible to configure binutils for these triples
but the resulting linker defaults to little endian with huge numbers
of testsuite failures, which on the face of it does not appear to make
much sense.

This patch makes the behaviour similar to armeb-elf and the testsuite
is clean.

bfd/ChangeLog:

2014-08-20  Will Newton  <will.newton@linaro.org>

	* config.bfd: Default armeb-*-eabi* to big endian.

ld/ChangeLog:

2014-08-20  Will Newton  <will.newton@linaro.org>

	* configure.tgt: Default armeb-*-eabi* to big endian.
aarch64: Fix CFA encoding of vector registers

	* config/tc-aarch64.c (tc_aarch64_regname_to_dw2regnum): Fix
	register number for vector register types.
aarch64: Adjust dwarf2 encoding factors

	* config/tc-aarch64.h (DWARF2_LINE_MIN_INSN_LENGTH): Set to 4.
	(DWARF2_CIE_DATA_ALIGNMENT): Set to -8.
Fix linker testsuite failures for Aarch64.
Resolves PR 17312

	* ld-aarch64/eh-frame-foo.s: Use 8-byte offset for X30.
	* ld-aarch64/eh-frame-bar.s: Likewise.
	* ld-aarch64/eh-frame.d: Updated to match current readelf output.
	* ld-elf/eh5.d: Allow any register names.
[AArch64] Improve copy relocation support on four absolute relocation types

2014-08-26  Jiong Wang  <jiong.wang@arm.com>

  bfd/
	* elfnn-aarch64.c (elfNN_aarch64_check_relocs): Initialize non_got_ref
	properly for MOVW_G0/1/2_NC and MOVW_G3.  Reject them when linking
	shared library.
	(elfNN_aarch64_gc_sweep_hook): Add check on these relocs.

  ld/testsuite/
	* ld-aarch64/copy-relocs-so.s: New test file.
	* ld-aarch64/copy-relocs-exe.s: Likewise.
	* ld-aarch64/copy-relocs.d: New expectation file.
	* ld-aarch64/emit-relocs-264-bad.d: New test file.
	* ld-aarch64/emit-relocs-266-bad.d: Likewise.
	* ld-aarch64/emit-relocs-268-bad.d: Likewise.
	* ld-aarch64/emit-relocs-269-bad.d: Likewise.
	* ld-aarch64/aarch64-elf.exp: Run new added test.
aarch64: Decode dwarf2 register numbers

	* dwarf.h (init_dwarf_regnames_aarch64): Declare.
	* dwarf.c (dwarf_regnames_aarch64): New.
	(init_dwarf_regnames_aarch64): New.
	(init_dwarf_regnames): Call it.
	* objdump.c (dump_dwarf): Likewise.
src-release.sh: Convert src-release to a shell script

This began as an attempt to make a few small changes to src-release
but heeding the comments at the top of the file it seemed it might be
wise to convert it to a shell script instead which should hopefully
be more maintainable.

This shell script contains most of the functionality of the Makefile
version. It can be run like this:

  # This will build gdb and compress with bzip2, gzip and xz
  ./src-release.sh -bgx gdb

The functionality that has been removed is building tarballs for insight
and gnats, which were broken in the current repository layout and
gas+binutils which amounted to basically the same thing as binutils so
didn't seem worth keeping. The script always builds a tar file,
compression is optional, so no need for specific commands to build tar
files rather than compressed tar files.

The build of gas releases has been fixed, as has extraction of version
numbers which had been broken since the switch to configure.ac files
and AC_INIT.

I also removed the code for distcleaning the intl sub-directory as it
seems like that issue has been fixed.

The script is capable of compressing with bzip2, gzip and xz which
should cover all formats available on gnu.org.

I tested it by producing release tarballs which are substantially
identical to the ones produced by the src-release script.

ChangeLog:

2014-08-27  Will Newton  <will.newton@linaro.org>

	* src-release.sh: New file.
	* src-release: Remove file.
src-release.sh: Use configure.in instead of configure.ac
src-release.sh: Add support for building binutils-linaro