Add turbocheck Makefile target.

The turbocheck target is similar to quickcheck, but runs only the
turbofan variant.

R=machenbach@chromium.org

Review URL: https://codereview.chromium.org/697573002

Cr-Commit-Position: refs/heads/master@{#25026}
git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@25026 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
X64: replace explicit zero-extend with runtime assert

Since the input float64 is in the range of [0, 2^32-1], the upper 32 bits of output register
should be zero.

BUG=
R=bmeurer@chromium.org, titzer@chromium.org

Review URL: https://codereview.chromium.org/644993002

Patch from Weiliang Lin <weiliang.lin@intel.com>.

Cr-Commit-Position: refs/heads/master@{#25027}
git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@25027 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
Ensure we don't try to inline raw access to indexed interceptor receivers.

BUG=chromium:419220
LOG=y
R=mvstanton@chromium.org

Review URL: https://codereview.chromium.org/697643002

Cr-Commit-Position: refs/heads/master@{#25028}
git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@25028 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
Assert that unoptimized code does not embed context-specific objects.

R=verwaest@chromium.org

Review URL: https://codereview.chromium.org/690713003

Cr-Commit-Position: refs/heads/master@{#25029}
git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@25029 ce2b1a6d-e550-0410-aec6-3dcde31c8c00