net: ethoc: implement basic ethtool operations

The following methods are implemented:
- get link state (standard implementation);
- get timestamping info (standard implementation).

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Ben Hutchings <ben@decadent.org.uk>
net: ethoc: implement ethtool get/set settings

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
net: ethoc: implement ethtool get registers

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Ben Hutchings <ben@decadent.org.uk>
net: ethoc: implement ethtool get/set ring parameters

TX and RX rings share memory and descriptors. Maximal number of
descriptors reported is one less than the total available nuber of
descriptors. For the set operation the requested number of TX descriptors
is rounded down to the nearest power of two (driver logic requirement).

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
net: ethoc: make ethoc_ethtool_ops static

This fixes the followin sparse warning:

sparse: symbol 'ethoc_ethtool_ops' was not declared. Should it be static?

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
net: ethoc: don't advertise gigabit speed on attached PHY

OpenCores 10/100 Mbps MAC does not support speeds above 100 Mbps, but does
not disable advertisement when PHY supports them. This results in
non-functioning network when the MAC is connected to a gigabit PHY connected
to a gigabit switch.

The fix is to disable gigabit speed advertisement on attached PHY
unconditionally.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
net: ethoc: set up MII management bus clock

MII management bus clock is derived from the MAC clock by dividing it by
MIIMODER register CLKDIV field value. This value may need to be set up
in case it is undefined or its default value is too high (and
communication with PHY is too slow) or too low (and communication with
PHY is impossible). The value of CLKDIV is not specified directly, but
is derived from the MAC clock for the default MII management bus frequency
of 2.5MHz. The MAC clock may be specified in the platform data, or as
either 'clock-frequency' or 'clocks' device tree attribute.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
net: ethoc: document OF bindings

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>