[NVPTX] Just use getTypeAllocSize() when computing return value size for structures and vectors
[NVPTX] Emit .weak when linkage is not external, internal, or private
[NVPTX] Directly control the Machine SSA passes that are invoked for NVPTX.

NVPTX is a bit special in the optimizations it requires, so this gives
us better control over the backend optimization pipeline.
[NVPTX] Update sub-target feature detection
[NVPTX] Add target options for PTX 3.2/4.0 and SM 5.0 (Maxwell)

Default PTX version is set to PTX 3.2
[NVPTX] Add support for envreg reads
[NVPTX] Add support for isspacep instruction
[NVPTX] Add isel patterns for bit-field extract (bfe)
[NVPTX] Add missing isel patterns for 64-bit atomics
[NVPTX] Add support for efficient rotate instructions on SM 3.2+
[NVPTX] Implement fma and imad contraction as target DAGCombiner patterns

This also introduces DAGCombiner patterns for mul.wide to multiply two smaller integers and produce a larger integer
[NVPTX] Add support for [SHL,SRA,SRL]_PARTS
[NVPTX] Add missing boolean vector contents flag
[NVPTX] Clean up argument lowering code and properly handle alignment for structs and vectors
[NVPTX] Fix handling of ldg/ldu intrinsics.

The address space of the pointer must be global (1) for these intrinsics.  There must also be alignment metadata attached to the intrinsic calls, e.g.

%val = tail call i32 @llvm.nvvm.ldu.i.global.i32.p1i32(i32 addrspace(1)* %ptr), !align !0

!0 = metadata !{i32 4}
[NVPTX] Variables that start with llvm. or nvvm. are reserved and should not be emitted
[NVPTX] Emit .weak linkage for link_once, weak, available_externally, and common linkage
[NVPTX] Add support for .managed variables for UVM
[NVPTX] Error out if initializer is given for variable in an address space that does not support initialization
[NVPTX] Do not process samplers in GenericToNVVM