spi_qsd: Add vote for clock path

Currently the spi driver votes for its core clock. However, it is
possible that the core-clock's source will be off. When the source
is off, the spi core is not clocked. This patch adds voting for
the entire clock path, thus guarantee clocking to the spi core.
Voting for the path cost a few msecs. A client may choose when
to pay this overhead. By default the votes takes place in the
runtime-pm callbacks which tie to transaction requests. A client
may choose to invoke these callbacks itself whenever it likes
by directly calling the driver's runtime-pm. A third option is
to set the active_only flag in platform data which results in the
callbacks being called when the application processor power state
changes.

CRs-Fixed: 478465
Change-Id: Ib866399c0e84a875a19a0d1506d77bbe77d5fe61
Signed-off-by: Gilad Avidov <gavidov@codeaurora.org>
msm: acpuclock-cortex: Detect bootloader cpu configuration

Detect which cpu rate is currently selected by the bootloaders during
probe. If the rate is invalid, then set the cpu rate to maximum.

Change-Id: I316d5de76133e76993a47b0d2917fd35bc5dd590
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
msm: clock-pll: Force PLLs off before reprogramming

PLLs can be enabled by the bootloaders without linux's knowledge. Ensure
the plls are off before changing their rates.

Change-Id: I77d1519117257570a1f3fa2e451d88b20776a013
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
msm: clock-8226: Fix incorrect voltage limit value

The hw and sw frequency plan rounded the SVS frequency limit for the
vcodec clk to different values.

Change-Id: I721556cbdce7923f287eb733ccf16701ea7d3347
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
msm: buspm: Enable busPM for targets which support bus scaling.

BusPM module should not depend on individual target configs
as it previously was. Fix this by tying busPM module with
MSM_BUS_SCALING conifg and enable it on all targets where
bus scaling is enabled.

CRs-Fixed: 486454
Change-Id: I5e44b6b63dd8577a5db6fa6f34526af0a4933c82
Signed-off-by: Gagan Mac <gmac@codeaurora.org>
msm: msm_bus: Correct the return value from register-client

On failure, return 0, and not a non-zero value as that can
be interpreted as a valid client ID.

Change-Id: I7a5b448bc398b4a4792170147a5e5317d25f8b3c
CRs-Fixed: 486328
Signed-off-by: Gagan Mac <gmac@codeaurora.org>
msm: subsystem_restart: Change the error ready log message

The error services interrupt log message appears as if it is
reporting an error. So, change it so that it does not appear so.

Change-Id: I84049af9d369d1c87547225813ec6cf1c4a66db5
Signed-off-by: Seemanta Dutta <seemanta@codeaurora.org>
msm: clock-8610: Correct bimc_clk measurement mux select

The bimc_clk measurement mux select value is wrong.
Fix it so that the right clock is measured.

CRs-Fixed: 495360
Change-Id: I3230817fb9f5851d0c98a52338e8cb74a3e2cef4
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
msm: clock-8974: Support 8974ac frequency plan

Update frequency tables and fmax settings for certain
clocks to match the latest 8974ac frequency plan data.

Change-Id: Iad9d7485eeae0c9f21f5829a96fab355fa575bd2
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
msm: clock-rpm: Correct is_enabled implementation for RPM-SMD clocks

Clocks using the RPM-SMD driver have no way to query
clock state from the RPM. Therefore do not use the
get_rate function to figure out the enable-state of
the clock.

Change-Id: I4d142c716a4e41e54185e4ed4fe9feb33a1c2427
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
msm: acpuclock-cortex: Select freq plan based on speed bin value

Due to process variation, not all hw has the same max speed. Duplicate
each speed_bin twice to allow greater flexibility between process yield
and chip demand. The bin values are chosen so that additional fuses can be
blown once to change between bins without the use of the multipurpose
redundant fuses.

Change-Id: I2e4f8c5c4d29e0461b455a3bd46a884bb43f6c20
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
msm: clock-8974: Fix 8974ac gpll4 and mclk changes

GPLL4 only exists on v3 variants, and shouldn't be in the lookup table
for v1/v2.  Camera MCLK is changed to match its clock type.

Change-Id: Id15313bfcaed783f7f835ff75f651e38d4bad8de
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
msm: clock-pll: Add clk_round/set_rate() support for fixed rate PLLs

For any clock that dynamically decides the right parent to use during a
clk_set_rate() call, the parents need to support clk_round_rate() and
clk_set_rate() APIs to aid with the decision making. Since PLLs could be
parents to such clocks, add support for these clk_set_rate() and
clk_round_rate() to fixed rate PLLs.

clk_round_rate() always returns the fixed rate of the PLL and
clk_set_rate() fails for any rate that's not equal to the fixed rate of the
PLL.

Change-Id: I867e253040bd9d01f9a8a8437adf511553bfcbfe
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
msm: clock-mdss: Toggle lock detect before checking for PLL lock

The enable sequences for the DSI PLL for MSM8226 poll a hardware
status register in order to determine whether the PLL has locked.
However, with the current sequences, it is possible that the
hardware status register would indicate a PLL lock even though the
PLL is not really locked. To avoid this, toggle the lock detect
register setting before polling for PLL lock status.

CRs-Fixed: 490476
Change-Id: I6e1357afaa6a86be9ab92095a41768873c70cf0d
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
msm: spm-regulator: add support for mode selection

Add support to the spm-regulator driver to select which regulator
operating mode to utilize.  There are three possible mode
selections: PWM mode, auto mode, or the existing mode set by
hardware or bootloaders.

Change-Id: Ieaf69f26078d4e9f14db3b2eb7b5cbe2dc8ed31e
Signed-off-by: David Collins <collinsd@codeaurora.org>
msm: clock-8974: Change SDCC1 clock to 384MHz

Following the change of hardware configuration, SDCC1 clock frequency is
reduced to 384MHz.

CRs-fixed: 518823
Change-Id: I849b612966d286b5ee18ab4a3da4d998a696e01f
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
msm: clock-8974: Add cdccal clocks for SDCC1

In order for SDCC to config CDC calibration controller, cdccal clocks
needs to be enabled.  Add support for controlling sdcc_cdccal clocks.

Change-Id: I5959a366598612aa35f02920d5a63a251f597f9b
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
msm: clock-8974: Add support for 8974Pro aa/ab/ac variants

8974Pro aa/ab/ac have different Camera and SDCC frequencies.
Update them to match the latest clock plan.  In addition,
enable aux output of MPLL3 for Camera VFE.

Change-Id: I00835242719717de0c51f694b6976c8fe00418f1
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
msm: tracing: disable tracing for the RTB log functions

The function graph tracer causes a kernel crash when enabled. The
counter_get_cntvct_mem and uncached_logk functions call each other
recursively causing a kernel stack overflow. Fix this by annotating
RTB log functions with notrace.

Change-Id: I196a2d554e8210f4a2fb2ee5d489be5b1eb2cab5
CRs-Fixed: 525920
Signed-off-by: Sarang Joshi <spjoshi@codeaurora.org>
msm: clock-8974: Move cdccal clocks to Pro only lookup table

SDCC cdccal clocks do not exist on v2.  Move them to 8974pro lookup
table.

Change-Id: I05ee982e53477201061cbc6bf6f2de1ae43a432f
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>