coresight: add lpae support for coresight tmc driver

Modify the CoreSight TMC driver for LPAE so that it can support
ETR physical addresses greater than 32 bits when LPAE is enabled.

Change-Id: I6db2c98c4db70262ab45f7ff11fe2a6846259f8a
Signed-off-by: Pushkar Joshi <pushkarj@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
coresight: Add support for byte counter interrupt feature

The CoreSight block can produce an interrupt on transfer of
programmed number of bytes to ETR-memory. Use this feature
to provide an interface to manage the byte counter value and
to collect a continuous data stream from userspace.

Change-Id: Ic00c9b19483be566d0f05005936b4a6ff7ab52f1
Signed-off-by: Pushkar Joshi <pushkarj@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
coresight: use dma_alloc_coherent for allocating tmc-etr memory

The CoreSight TMC driver when configured for ETR requires uncached
memory in RAM to which it routes trace data. In order to allocate
this memory replace existing allocate_contiguous_ebi api with
dma_alloc_coherent api which is the linux standard of allocating
memory.

Change-Id: I59f88009f2abed95fd9b81ea92a7d484b9d6b833
Signed-off-by: Aparna Das <adas@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>