or1k: Wrong PICSR handling

We cannot write a value to PICSR, instead writing a one to a bit in it
clears the value, see architecture manual, sec. 13.3:

"The atomic way to clear an interrupt source which is edge-triggered
is by writing a '1' to the corresponding bit in the PICSR. This will
clear the underlying latch for the edge-triggered source. Writing a
'0' to the corresponding bit in the PICSR has no effect on the
underlying latch."

So, instead of writing the updated PICSR in the end, we simply clear
every bit after the ISR was executed. It has no effect for level
triggered.