added jtag bsd file for xilinx part used in vc707
comment out BSCAN xdc info for vc707
add defaultClock method for bcsan.sel
shift bscan tracing to use USER2
removed BSCANE2 placement comments.  When USER2/USER3 used in examples, vivado correctly places for vc707
(the combo USER1/USER2 fails with the vivado message 'I placed BSCANE2 in the wrong location and there is nothing you can do about it')
simplify/fix BramMux for JTAG readout of PCIE traces (now works!!)