Experimental port of N.I.G.E. Machine to the Nexys2 500k gate board

- reduced SRAM from 48k to 27k
- Reconfigured Xilinx project settings and identifiers
- Pinouts unchanged as the pins that differ between the 1200K and 500K boards are not used in this design
- Updates to FORTH.asm to reflect reduced memory, plus some minor fixes brought forward

Please note that this is an untested experimental port.  Damage to the Nexys2 board is highly unlikely, but please only use if you are comfortable with an experimantal version.