RELOCATABLE_RAMSTAGE: Fix weak symbols with ramstage_cache

We had NULL reference with cache_loaded_ramstage() if
CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM was not set so boot never
proceeded to ramstage.

Cache implementation outside CBMEM provides means for platform-specific
location so there is no need of weak attributes here.

Change-Id: I1eb1a713896395c424fde23252c374f9065fe74d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7954
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
RELOCATABLE_RAMSTAGE: Fix weak symbols in ACPI

After relocation the weak symbols are no longer NULL.
Always have empty stub function defined.

Change-Id: I6cb959c1fa10b4b63018e400636842e2a15d6e81
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7955
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
RELOCATABLE_RAMSTAGE: Fix weak symbols with option ROMs

After relocation the weak symbol map_oprom_vendev is no longer NULL.
Always have empty stub function defined.

Change-Id: I5b1bdeb3f37bb04363cf3d9dedaeafc9e193aaae
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7956
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
intel: Fix microcode alignment

CPU_MICROCODE_CBFS_LOC used a non-existing dependency variable
CPU_MICROCODE_IN_CBFS. This broke alignment of microcode in CBFS.

Remoce CPU_MICROCODE_CBFS_LOC from global namespace as it is only
used with PLATFORM_FSP.

CPU_MICROCODE_CBFS_LEN was no longer used at all.

Change-Id: I0454397924d2526d97b1f095cc371ba962873c99
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7957
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
cbfstool: Fix update-fit command

Regression in commit 3fcde22 caused parse_microcode_blob() to access
data outside cpu_microcode_blob.bin file in CBFS and create invalid
Intel Firmware Interface Table entries.

Change-Id: I1a687060084c2acd6cac5f5053b74a332b4ac714
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7958
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
intel: Fix UPDATE-FIT step in build

Regression in commit 88ca81a caused UPDATE-FIT step to no longer run when
microcode was added to CBFS.

Change-Id: I6ea4b6b6a8de598be810c930baa497f8c7fdc4b8
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7959
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
intel baytrail broadwell: Include microcode updates

Commit 66e0c4c renamed the variable.

Change-Id: I9e8dc3e7f140411d04b35a21ada76aaa578832fb
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7960
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>