core.atomic is less complicated than it used to be--I dropped the hlb, hsb, slb, ssb options (hoist-load barrier, hoist-store barrier, sink-load barrier, sink-store barrier).  But I don't think there's any reason to not have redundancy in this case.  It reads more clearly to me as "sequenced or isSinkOp" rather than just "isSinkOp".

For what it's worth, the hoist/sink terminology is from Alexander Terekhov.  I've adopted it because I think the SPARC terminology of LoadLoad barriers and the like is totally confusing.  So "hoist-load barrier" means that the CPU cannot move loads upwards beyond the barrier.  It prevents "hoisting" of loads.  A "sink-store barrier" means the CPU cannot move stores down past the barrier.  And so on.  So a hoist-load and hoist-store barrier together are an acquire, and a sink-load and sink-store barrier together together are a release.