msm: perf: reset perf cycle counter on krait

The cycle counter was not included in the list of
counters being reset. This could result in the cc
enable bit being set randomly, leading to spurious
interrupts when the counter overflowed, even though
the cc was not being used.

Change-Id: Ic7da5e78f932a25d05ce116aeec7a0709ddbb20e
Signed-off-by: Neil Leeder <nleeder@codeaurora.org>
Perf: interrupt disable without bringing cpus up

Refactor the interrupt disabling so that interrupts
are disabled when a cpu is hotplugged out, even if
there are no perf events on that cpu, but it holds
the PMU irq. This means that when perf ends it does
not have to re-enable an offline cpu just to disable
its irq.

Change-Id: Id0e052e4386173e107abe0eb6e80cb130d92ec24
Signed-off-by: Neil Leeder <nleeder@codeaurora.org>

Conflicts:
	arch/arm/kernel/perf_event_cpu.c

Change-Id: I4a87625042d50bc8a8715b82dc67f967ecc213aa
Perf: stop counters when going into hotplug

Hotplug disables the pmu irq, but if counters are
running in the window before the CPU is hotplugged off
they can overflow and generate an interrupt. Because the
interrupt is disabled, this prevents the cpu from going
down which leads to a spin loop in the cpu_down driver
which consumes 100% cpu.

Events are stopped during hotplug processing. However,
perf is hooked into the timer tick, and restarts enabled
events on every tick, even if they were stopped. Change
the event state to OFF to prevent this.

Processing for stop reads the counters, so a separate call
is no longer needed. Start processing re-enables events so
the from_idle flag is not needed during pmu_enable.

Change-Id: I27ded876315147b50d9f85c09487b107a9216641
Signed-off-by: Neil Leeder <nleeder@codeaurora.org>
msm: perf: Refine disable/enable in tracecounters

Tracecounter code was not disabling counters as early as possible
and enabling them as late as possible. Refine the logic so cycles
spent inside the handler are as lower. This results in more accurate
per-process counter values.

Change-Id: Ib8bb17b1212ddf9e3d1c33a00ae486d885a36e45
Signed-off-by: Sheetal Sahasrabudhe <sheetals@codeaurora.org>

Conflicts:
	arch/arm/mach-msm/perf_debug.c

Change-Id: I34be031cba461becb6da9090d688e0ae7f423603