freedreno/a4xx: add render target format to fd4_emit

This lets us move emitting SP_FS_MRT_REG back to fd4_program_emit.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
freedreno: update generated headers

Signed-off-by: Rob Clark <robclark@freedesktop.org>
freedreno/a4xx: stencil fixes

Signed-off-by: Rob Clark <robclark@freedesktop.org>
freedreno/ir3: fix UMAD

Looks like none of the mad variants do u16 * u16 + u32, so just add in
the extra value "by hand".

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.3 10.4" <mesa-stable@lists.freedesktop.org>
freedreno/ir3: remove unused arg parameter

Leaving it around in the struct in case we want to use it later.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
freedreno/a3xx: add 16-bit unorm/snorm texture formats

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
freedreno/a3xx: add format to emit info, use to set sint/uint flags

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
freedreno/a3xx: remove blend clamp enables from gmem/clears

Just pass the data through unmolested. This probably has no effect since
blending isn't actually enabled.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
freedreno/a3xx: disable blending for integer formats

Also add support for the BLENDABLE bind flag, similarly predicated on
non-int formats.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
freedreno/a3xx: don't use half precision shaders for int/float32

Integer outputs end up getting mangled due to cov.f32f16, and float32
loses precision. Use full precision shaders in both of those cases.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
freedreno: allow each generation to hook into sampler view setting

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
freedreno/a3xx: enable sampling from integer textures

We need to produce a u32 destination type on integer sampling
instructions, so keep that in a shader key set based on the
currently-bound textures.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
freedreno/a3xx: add missing integer formats and enable rendering

The mesa state tracker doesn't fall back on similar integer formats, so
they must all be provided. Remove the restriction against integer color
rendering.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
st/mesa: avoid exposing EXT_texture_integer for pre-GLSL 1.30

For drivers building up to GL(ES)3, only expose the actual extension if
the API will let it be used (e.g. via overrides/debug flags that enable
higher versions).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
freedreno/a4xx: invalidate cache when vbo's change

Otherwise vertex shader can see stale cache data.  This in particular
happens when the same vbo is updated and reused.  Not sure yet if vbo's
at differing addresses but bound to same vertex buffer slot could have
issues, but seems safest to flush whenever new vertex buffers are bound.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
vc4: Add another check for invalid TLB scoreboard handling.

This was caught by an assertion in the simulator.
vc4: Fix assertion about SFU versus texturing.

We're supposed to be checking that nothing else writes r4, which is done
by the TMU result collection signal, not the coordinate setup.

Avoids a regression when QPU instruction scheduling is introduced.
vc4: Also deal with VPM reads at thread end.

Prevents a regression with QPU scheduling, which happens to put the no-op
reads for unused VPM contents end up at the end of the program.
vc4: Drop the explicit scoreboard wait.

This is actually implicitly handled by the TLB operations.
vc4: Introduce scheduling of QPU instructions.

This doesn't reschedule much currently, just tries to fit things into the
regfile A/B write-versus-read slots (the cause of the improvements in
shader-db), and hide texture fetch latency by scheduling setup early and
results collection late (haven't performance tested it).  This
infrastructure will be important for doing instruction pairing, though.

shader-db2 results:
total instructions in shared programs: 61874 -> 59583 (-3.70%)
instructions in affected programs:     50677 -> 48386 (-4.52%)