Detect EXT patterns to vec_perm_const, use for EXT intrinsics

        * config/aarch64/aarch64-builtins.c (aarch64_types_binopv_qualifiers,
        TYPES_BINOPV): New static data.
        * config/aarch64/aarch64-simd-builtins.def (im_lane_bound): New builtin.
        * config/aarch64/aarch64-simd.md (aarch64_ext, aarch64_im_lane_boundsi):
        New patterns.
        * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const_1): Match
        patterns for EXT.
        (aarch64_evpc_ext): New function.

        * config/aarch64/iterators.md (UNSPEC_EXT): New enum element.

        * config/aarch64/arm_neon.h (vext_f32, vext_f64, vext_p8, vext_p16,
        vext_s8, vext_s16, vext_s32, vext_s64, vext_u8, vext_u16, vext_u32,
        vext_u64, vextq_f32, vextq_f64, vextq_p8, vextq_p16, vextq_s8,
        vextq_s16, vextq_s32, vextq_s64, vextq_u8, vextq_u16, vextq_u32,
        vextq_u64): Replace __asm with __builtin_shuffle and im_lane_boundsi.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@211058 138bc75d-0d04-0410-961f-82ee72b054a4
Add execution tests of ARM EXT intrinsics

	gcc.target/arm/simd/vextQf32_1.c: New file.
	gcc.target/arm/simd/vextQp16_1.c: New file.
	gcc.target/arm/simd/vextQp8_1.c: New file.
	gcc.target/arm/simd/vextQs16_1.c: New file.
	gcc.target/arm/simd/vextQs32_1.c: New file.
	gcc.target/arm/simd/vextQs64_1.c: New file.
	gcc.target/arm/simd/vextQs8_1.c: New file.
	gcc.target/arm/simd/vextQu16_1.c: New file.
	gcc.target/arm/simd/vextQu32_1.c: New file.
	gcc.target/arm/simd/vextQu64_1.c: New file.
	gcc.target/arm/simd/vextQu8_1.c: New file.
	gcc.target/arm/simd/vextQp64_1.c: New file.
	gcc.target/arm/simd/vextf32_1.c: New file.
	gcc.target/arm/simd/vextp16_1.c: New file.
	gcc.target/arm/simd/vextp8_1.c: New file.
	gcc.target/arm/simd/vexts16_1.c: New file.
	gcc.target/arm/simd/vexts32_1.c: New file.
	gcc.target/arm/simd/vexts64_1.c: New file.
	gcc.target/arm/simd/vexts8_1.c: New file.
	gcc.target/arm/simd/vextu16_1.c: New file.
	gcc.target/arm/simd/vextu32_1.c: New file.
	gcc.target/arm/simd/vextu64_1.c: New file.
	gcc.target/arm/simd/vextu8_1.c: New file.
	gcc.target/arm/simd/vextp64_1.c: New file.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@211059 138bc75d-0d04-0410-961f-82ee72b054a4
2014-05-29  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/61325
	* lra-constraints.c (process_address): Rename to
	process_address_1.
	(process_address): New function.

2014-05-29  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/61325
	* gcc.target/aarch64/pr61325.c: New.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@211061 138bc75d-0d04-0410-961f-82ee72b054a4