x86: Filter LVT delivery modes

Do not allow cells to program anything else than Fixed or NMI mode. NMIs
will still be swallowed by the hypervisor NMI interception path, so perf
& Co. remain broken.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Update TODO

Recently added APIC topics are addressed now. Also add new ideas
regarding error handling and cell watchdogs / message timeouts.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
inmates: pci-demo: Clear STATESTS before triggering the MSI

STATESTS may still have pending events which could prevent a MSI
delivery after controller reset. That reset doesn't clear them, so do
this explicitly.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
configs: Adjust MSI capability address of HDA devices

Real hardware locates MSI at 0x60, only current QEMU has this at 0x50
(patch posted).

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
core: Fix calculation of MMCONFIG region size

The PCI Firmware Specification says: "For PCI-X and PCI Express
platforms utilizing the enhanced configuration access method, the base
address of the memory mapped configuration space always corresponds to
bus number 0 (regardless of the start bus number decoded by the host
bridge) [...]." So drop the start bus from the size calculation.

Moreover, we had an off-by-one regarding end bus to size translation.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Drop useless conditions from data_port_in/out_handler

Size must be 4 if it's not 1 or 2.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
core: Provide MMIO accessors for all sizes

Use a macro to define size-specific MMIO accessors and add support for
8 and 16 bit.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
core: Privatize PCI_CONFIG_HEADER_SIZE define

No use case outside of hypervisor/pci.c

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Micro-refactor vtd_add_device_to_cell/vtd_remove_device_from_cell

Keep the pointer of referenced root table entry low-word instead of its
value. This simplifies its manipulation later on.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
core/configs/tools: Switch PCI configuration format to single BDF value

There is no value in splitting up the PCI device address in the config
format into bus and devfn. Fold them into a single value that can easier
be matched and is also easily be split up again via new helper macros
whenever needed.

This generates some work for locally maintained config file, sorry.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
core: Pass combined register address to pci_cfg_read/write_moderate

Fold reg_base and reg_bias parameters of the access moderation functions
into a single address value. It simplifies most callers.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Factor out arch_pci_read/write_config

These PIO-based access functions will be reused for providing
hypervisor-internal config access.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Clean up PCI defines

Most of them became unused. Use self-describing definitions for the
remaining ones.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
core: Introduce generic PCI config space access functions

If available, these functions use MMIO-based access. Otherwise, they
call the arch-specific access functions.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
tools: config-create: Initialize PCIDevice.num_caps already on construction

No need to postpone this until we know where the caps are located -
their number will stay the same.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
configs/tools: Add number of MSI vectors to PCI device config structure

This avoids having to scan in the hypervisor the MSI/MSI-X capabilities
regarding the maximum number of vectors a PCI device may use.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Fix error path in arch_cell_create

Regression of 46ab6c2f1e: Properly return the error if vtd_cell_init
fails.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
core: Introduce PCI device state

We will have to store a number of runtime state information for PCI
devices. Allocate these states as an array during cell creation and
release them on cell destruction.

We can already use the structure to keep a reference to the cell the
device belongs to. This avoids having to pass this around over multiple
hops.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Use PCI device structure inside VTD code

Perpare the VTD PCI device handling code for dealing with or passing of
PCI device states instead of the static device information. This also
allows to simplify the code by switching vtd_return_device_to_root_cell
to pci_get_assigned_device.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
core: Only perform PCI config space writes on PCI_ACCESS_PERFORM

If we emulate a config space write, we may be able to skip the physical
access completely. To model this, rename PCI_ACCESS_EMULATE to
PCI_ACCESS_DONE which signals to the caller of the moderation functions
that no physical access should be performed.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>